[llvm-commits] [llvm] r113473 - in /llvm/trunk: lib/Target/ARM/ARMInstrNEON.td test/CodeGen/Thumb2/machine-licm-vdup.ll

[Bob Wilson]

Author: bwilson
Date: Thu Sep  9 00:40:26 2010
New Revision: 113473

URL: http://llvm.org/viewvc/llvm-project?rev=113473&view=rev
Log:
Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from
the VST pseudos.  The VLD/VST scheduling still needs work (see pr6722), but
at least we shouldn't confuse the loads with the stores.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
    llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=113473&r1=113472&r2=113473&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Thu Sep  9 00:40:26 2010
@@ -170,20 +170,20 @@
 // Classes for VLD* pseudo-instructions with multi-register operands.
 // These are expanded to real instructions after register allocation.
 class VLDQPseudo
-  : PseudoNLdSt<(outs QPR:$dst), (ins addrmode6:$addr), IIC_VST, "">;
+  : PseudoNLdSt<(outs QPR:$dst), (ins addrmode6:$addr), IIC_VLD2, "">;
 class VLDQWBPseudo
   : PseudoNLdSt<(outs QPR:$dst, GPR:$wb),
-                (ins addrmode6:$addr, am6offset:$offset), IIC_VST,
+                (ins addrmode6:$addr, am6offset:$offset), IIC_VLD2,
                 "$addr.addr = $wb">;
 class VLDQQPseudo
-  : PseudoNLdSt<(outs QQPR:$dst), (ins addrmode6:$addr), IIC_VST, "">;
+  : PseudoNLdSt<(outs QQPR:$dst), (ins addrmode6:$addr), IIC_VLD4, "">;
 class VLDQQWBPseudo
   : PseudoNLdSt<(outs QQPR:$dst, GPR:$wb),
-                (ins addrmode6:$addr, am6offset:$offset), IIC_VST,
+                (ins addrmode6:$addr, am6offset:$offset), IIC_VLD4,
                 "$addr.addr = $wb">;
 class VLDQQQQWBPseudo
   : PseudoNLdSt<(outs QQQQPR:$dst, GPR:$wb),
-                (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VST,
+                (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VLD4,
                 "$addr.addr = $wb, $src = $dst">;
 
 //   VLD1     : Vector Load (multiple single elements)

Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll?rev=113473&r1=113472&r2=113473&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll Thu Sep  9 00:40:26 2010
@@ -12,7 +12,7 @@
 
 bb1:
 ; CHECK-NEXT: %bb1
-; CHECK: vdup.32 q1, r3
+; CHECK: vdup.32 q{{.*}}, r3
   %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
   %tmp1 = shl i32 %indvar, 2
   %gep1 = getelementptr i8* %ptr1, i32 %tmp1