[llvm-commits] [llvm] r113289 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

[Jim Grosbach]

Author: grosbach
Date: Tue Sep  7 16:30:25 2010
New Revision: 113289

URL: http://llvm.org/viewvc/llvm-project?rev=113289&view=rev
Log:
grammar tweak

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=113289&r1=113288&r2=113289&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Tue Sep  7 16:30:25 2010
@@ -535,7 +535,7 @@
 //  Load / store multiple Instructions.
 //
 
-// These requires base address to be written back or one of the loaded regs.
+// These require base address to be written back or one of the loaded regs.
 let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in {
 def tLDM : T1I<(outs),
                (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops),