[llvm-commits] [llvm] r113261 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h include/llvm/CodeGen/ValueTypes.td include/llvm/Intrinsics.td lib/Target/X86/X86ISelLowering.cpp lib/VMCore/ValueTypes.cpp utils/TableGen/CodeGenTarget.cpp

Bill Wendling isanbard at gmail.com
Tue Sep 7 13:03:56 PDT 2010


Author: void
Date: Tue Sep  7 15:03:56 2010
New Revision: 113261

URL: http://llvm.org/viewvc/llvm-project?rev=113261&view=rev
Log:
Add an MVT::x86mmx type. It will take the place of all current MMX vector types.


Modified:
    llvm/trunk/include/llvm/CodeGen/ValueTypes.h
    llvm/trunk/include/llvm/CodeGen/ValueTypes.td
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/VMCore/ValueTypes.cpp
    llvm/trunk/utils/TableGen/CodeGenTarget.cpp

Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=113261&r1=113260&r2=113261&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Tue Sep  7 15:03:56 2010
@@ -50,17 +50,17 @@
 
       v2i8           =  12,   //  2 x i8
       v4i8           =  13,   //  4 x i8
-      v8i8           =  14,   //  8 x i8
+      v8i8           =  14,   //  8 x i8  - MMX type
       v16i8          =  15,   // 16 x i8
       v32i8          =  16,   // 32 x i8
       v2i16          =  17,   //  2 x i16
-      v4i16          =  18,   //  4 x i16
+      v4i16          =  18,   //  4 x i16 - MMX type
       v8i16          =  19,   //  8 x i16
       v16i16         =  20,   // 16 x i16
-      v2i32          =  21,   //  2 x i32
+      v2i32          =  21,   //  2 x i32 - MMX type
       v4i32          =  22,   //  4 x i32
       v8i32          =  23,   //  8 x i32
-      v1i64          =  24,   //  1 x i64
+      v1i64          =  24,   //  1 x i64 - MMX type
       v2i64          =  25,   //  2 x i64
       v4i64          =  26,   //  4 x i64
       v8i64          =  27,   //  8 x i64
@@ -74,11 +74,13 @@
       FIRST_VECTOR_VALUETYPE = v2i8,
       LAST_VECTOR_VALUETYPE  = v4f64,
 
-      Flag           =  33,   // This glues nodes together during pre-RA sched
+      x86mmx         =  33,   // This is an X86 MMX value
 
-      isVoid         =  34,   // This has no value
+      Flag           =  34,   // This glues nodes together during pre-RA sched
 
-      LAST_VALUETYPE =  35,   // This always remains at the end of the list.
+      isVoid         =  35,   // This has no value
+
+      LAST_VALUETYPE =  36,   // This always remains at the end of the list.
 
       // This is the current maximum for LAST_VALUETYPE.
       // EVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -247,6 +249,7 @@
       case i32 :
       case v4i8:
       case v2i16: return 32;
+      case x86mmx:
       case f64 :
       case i64 :
       case v8i8:

Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.td?rev=113261&r1=113260&r2=113261&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ValueTypes.td (original)
+++ llvm/trunk/include/llvm/CodeGen/ValueTypes.td Tue Sep  7 15:03:56 2010
@@ -49,14 +49,15 @@
 def v4i64  : ValueType<256, 26>;   //  4 x f64 vector value
 def v8i64  : ValueType<512, 27>;   //  4 x f64 vector value
 
-def v2f32  : ValueType<64,  28>;   //  2 x f32 vector value
+def v2f32  : ValueType<64 , 28>;   //  2 x f32 vector value
 def v4f32  : ValueType<128, 29>;   //  4 x f32 vector value
 def v8f32  : ValueType<256, 30>;   //  8 x f32 vector value
 def v2f64  : ValueType<128, 31>;   //  2 x f64 vector value
 def v4f64  : ValueType<256, 32>;   //  4 x f64 vector value
 
-def FlagVT : ValueType<0  , 33>;   // Pre-RA sched glue
-def isVoid : ValueType<0  , 34>;   // Produces no value
+def x86mmx : ValueType<0  , 33>;   // X86 MMX value
+def FlagVT : ValueType<0  , 34>;   // Pre-RA sched glue
+def isVoid : ValueType<0  , 35>;   // Produces no value
 
 def MetadataVT: ValueType<0, 250>; // Metadata
 

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=113261&r1=113260&r2=113261&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Tue Sep  7 15:03:56 2010
@@ -109,6 +109,8 @@
 def llvm_descriptor_ty : LLVMPointerType<llvm_empty_ty>;          // { }*
 def llvm_metadata_ty   : LLVMType<MetadataVT>;                    // !{...}
 
+def llvm_x86mmx_ty     : LLVMType<x86mmx>;
+
 def llvm_v2i8_ty       : LLVMType<v2i8>;     //  2 x i8
 def llvm_v4i8_ty       : LLVMType<v4i8>;     //  4 x i8
 def llvm_v8i8_ty       : LLVMType<v8i8>;     //  8 x i8

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=113261&r1=113260&r2=113261&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep  7 15:03:56 2010
@@ -614,6 +614,9 @@
   // FIXME: In order to prevent SSE instructions being expanded to MMX ones
   // with -msoft-float, disable use of MMX as well.
   if (!UseSoftFloat && !DisableMMX && Subtarget->hasMMX()) {
+    addRegisterClass(MVT::x86mmx, X86::VR64RegisterClass, false);
+
+    // FIXME: Remove the rest of this stuff.
     addRegisterClass(MVT::v8i8,  X86::VR64RegisterClass, false);
     addRegisterClass(MVT::v4i16, X86::VR64RegisterClass, false);
     addRegisterClass(MVT::v2i32, X86::VR64RegisterClass, false);

Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=113261&r1=113260&r2=113261&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/ValueTypes.cpp (original)
+++ llvm/trunk/lib/VMCore/ValueTypes.cpp Tue Sep  7 15:03:56 2010
@@ -110,6 +110,7 @@
   case MVT::isVoid:  return "isVoid";
   case MVT::Other:   return "ch";
   case MVT::Flag:    return "flag";
+  case MVT::x86mmx:  return "x86mmx";
   case MVT::v2i8:    return "v2i8";
   case MVT::v4i8:    return "v4i8";
   case MVT::v8i8:    return "v8i8";

Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=113261&r1=113260&r2=113261&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Tue Sep  7 15:03:56 2010
@@ -63,6 +63,7 @@
   case MVT::f80:      return "MVT::f80";
   case MVT::f128:     return "MVT::f128";
   case MVT::ppcf128:  return "MVT::ppcf128";
+  case MVT::x86mmx:   return "MVT::x86mmx";
   case MVT::Flag:     return "MVT::Flag";
   case MVT::isVoid:   return "MVT::isVoid";
   case MVT::v2i8:     return "MVT::v2i8";





More information about the llvm-commits mailing list