[llvm-commits] [llvm] r113186 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_instructions.s

[Chris Lattner]

Author: lattner
Date: Mon Sep  6 18:51:44 2010
New Revision: 113186

URL: http://llvm.org/viewvc/llvm-project?rev=113186&view=rev
Log:
"sldt <mem>" is ambiguous in 64-bit mode, but should
always be disambiguated as sldtw.  sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact.  Force it to sldtw, resolving rdar://8017530

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=113186&r1=113185&r2=113186&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Sep  6 18:51:44 2010
@@ -819,6 +819,13 @@
     Operands.push_back(X86Operand::CreateReg(Op->getReg(), Op->getStartLoc(),
                                              Op->getEndLoc()));
   }
+  
+  // 'sldt <mem>' can be encoded with either sldtw or sldtq with the same
+  // effect (both store to a 16-bit mem).  Force to sldtw to avoid ambiguity
+  // errors, since its encoding is the most compact.
+  if (Name == "sldt" && Operands.size() == 2 &&
+      static_cast<X86Operand*>(Operands[1])->isMem())
+    Operands[0] = X86Operand::CreateToken("sldtw", NameLoc);
 
   return false;
 }

Modified: llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s?rev=113186&r1=113185&r2=113186&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Mon Sep  6 18:51:44 2010
@@ -178,3 +178,6 @@
 // CHECK: pushq	$1
 push $1
 
+// rdar://8017530
+// CHECK: sldtw	4
+sldt	4