[llvm-commits] [llvm] r112881 - /llvm/trunk/include/llvm/IntrinsicsX86.td

[Dale Johannesen]

On Sep 2, 2010, at 3:31 PMPDT, Bill Wendling wrote:

> On Sep 2, 2010, at 3:30 PM, Eric Christopher wrote:
>
>> On Sep 2, 2010, at 3:26 PM, Bill Wendling wrote:
>>
>>> -//  def int_x86_mmx_palignr_b :  
>>> GCCBuiltin<"__builtin_ia32_palignr">,
>>> -//              Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty,
>>> -//                        llvm_v1i64_ty, llvm_i8_ty], [IntrNoMem]>;
>>> +//   def int_x86_mmx_palignr_b :  
>>> GCCBuiltin<"__builtin_ia32_palignr">,
>>> +//               Intrinsic<[llvm_v8i8_ty], [llvm_8i8_ty,
>>> +//                          llvm_v8i8_ty, llvm_i8_ty],  
>>> [IntrNoMem]>;
>>
>> This will, if it's ever re-enabled, likely not match the one coming  
>> from llvm-gcc.
>>
> The one from llvm-gcc was changed awhile ago from "long long" to  
> "v1di". I think the original was correct, but clang doesn't seem to  
> agree... Eh...I'll change it back.

llvm-gcc isn't currently producing an intrinsic for palignr because  
there isn't one.  I believe v8i8 corresponds best to what the  
instruction does, fwiw, but really in intrinsics "correct" is what we  
define it to be.

No rush on palignr, that needs some work in the BE before I can turn  
it on.