[llvm-commits] [llvm] r112726 - /llvm/trunk/lib/CodeGen/RegAllocFast.cpp
Jim Grosbach
grosbach at apple.com
Wed Sep 1 12:16:29 PDT 2010
Author: grosbach
Date: Wed Sep 1 14:16:29 2010
New Revision: 112726
URL: http://llvm.org/viewvc/llvm-project?rev=112726&view=rev
Log:
tidy up a few 80-column and trailing whitespace bits.
Modified:
llvm/trunk/lib/CodeGen/RegAllocFast.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=112726&r1=112725&r2=112726&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Wed Sep 1 14:16:29 2010
@@ -113,9 +113,9 @@
// Allocatable - vector of allocatable physical registers.
BitVector Allocatable;
- // SkippedInstrs - Descriptors of instructions whose clobber list was ignored
- // because all registers were spilled. It is still necessary to mark all the
- // clobbered registers as used by the function.
+ // SkippedInstrs - Descriptors of instructions whose clobber list was
+ // ignored because all registers were spilled. It is still necessary to
+ // mark all the clobbered registers as used by the function.
SmallPtrSet<const TargetInstrDesc*, 4> SkippedInstrs;
// isBulkSpilling - This flag is set when LiveRegMap will be cleared
@@ -267,11 +267,11 @@
TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
++NumStores; // Update statistics
- // If this register is used by DBG_VALUE then insert new DBG_VALUE to
+ // If this register is used by DBG_VALUE then insert new DBG_VALUE to
// identify spilled location as the place to find corresponding variable's
// value.
if (MachineInstr *DBG = LiveDbgValueMap.lookup(LRI->first)) {
- const MDNode *MDPtr =
+ const MDNode *MDPtr =
DBG->getOperand(DBG->getNumOperands()-1).getMetadata();
int64_t Offset = 0;
if (DBG->getOperand(1).isImm())
@@ -284,7 +284,7 @@
}
else
DL = MI->getDebugLoc();
- if (MachineInstr *NewDV =
+ if (MachineInstr *NewDV =
TII->emitFrameIndexDebugValue(*MF, FI, Offset, MDPtr, DL)) {
MachineBasicBlock *MBB = DBG->getParent();
MBB->insert(MI, NewDV);
@@ -796,16 +796,18 @@
else {
int SS = StackSlotForVirtReg[Reg];
if (SS == -1)
- MO.setReg(0); // We can't allocate a physreg for a DebugValue, sorry!
+ // We can't allocate a physreg for a DebugValue, sorry!
+ MO.setReg(0);
else {
// Modify DBG_VALUE now that the value is in a spill slot.
int64_t Offset = MI->getOperand(1).getImm();
- const MDNode *MDPtr =
+ const MDNode *MDPtr =
MI->getOperand(MI->getNumOperands()-1).getMetadata();
DebugLoc DL = MI->getDebugLoc();
- if (MachineInstr *NewDV =
+ if (MachineInstr *NewDV =
TII->emitFrameIndexDebugValue(*MF, SS, Offset, MDPtr, DL)) {
- DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << *MI);
+ DEBUG(dbgs() << "Modifying debug info due to spill:" <<
+ "\t" << *MI);
MachineBasicBlock *MBB = MI->getParent();
MBB->insert(MBB->erase(MI), NewDV);
// Scan NewDV operands from the beginning.
@@ -813,7 +815,8 @@
ScanDbgValue = true;
break;
} else
- MO.setReg(0); // We can't allocate a physreg for a DebugValue, sorry!
+ // We can't allocate a physreg for a DebugValue; sorry!
+ MO.setReg(0);
}
}
}
@@ -876,8 +879,8 @@
// operands. If there are also physical defs, these registers must avoid
// both physical defs and uses, making them more constrained than normal
// operands.
- // Similarly, if there are multiple defs and tied operands, we must make sure
- // the same register is allocated to uses and defs.
+ // Similarly, if there are multiple defs and tied operands, we must make
+ // sure the same register is allocated to uses and defs.
// We didn't detect inline asm tied operands above, so just make this extra
// pass for all inline asm.
if (MI->isInlineAsm() || hasEarlyClobbers || hasPartialRedefs ||
@@ -928,9 +931,9 @@
unsigned DefOpEnd = MI->getNumOperands();
if (TID.isCall()) {
// Spill all virtregs before a call. This serves two purposes: 1. If an
- // exception is thrown, the landing pad is going to expect to find registers
- // in their spill slots, and 2. we don't have to wade through all the
- // <imp-def> operands on the call instruction.
+ // exception is thrown, the landing pad is going to expect to find
+ // registers in their spill slots, and 2. we don't have to wade through
+ // all the <imp-def> operands on the call instruction.
DefOpEnd = VirtOpEnd;
DEBUG(dbgs() << " Spilling remaining registers before call.\n");
spillAll(MI);
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