[llvm-commits] [llvm] r112661 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86InstrFragmentsSIMD.td X86InstrSSE.td
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Tue Aug 31 15:35:05 PDT 2010
Author: bruno
Date: Tue Aug 31 17:35:05 2010
New Revision: 112661
URL: http://llvm.org/viewvc/llvm-project?rev=112661&view=rev
Log:
Use x86 specific MOVSLDUP node, add more patterns to match it and remove useless load nodes
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112661&r1=112660&r2=112661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug 31 17:35:05 2010
@@ -2587,6 +2587,7 @@
case X86ISD::MOVLHPS:
case X86ISD::MOVHLPS:
case X86ISD::MOVSHDUP:
+ case X86ISD::MOVSLDUP:
case X86ISD::MOVSS:
case X86ISD::MOVSD:
case X86ISD::PUNPCKLDQ:
@@ -2600,6 +2601,7 @@
switch(Opc) {
default: llvm_unreachable("Unknown x86 shuffle node");
case X86ISD::MOVSHDUP:
+ case X86ISD::MOVSLDUP:
return DAG.getNode(Opc, dl, VT, V1);
}
@@ -5168,9 +5170,10 @@
if (X86::isMOVSHDUPMask(SVOp) && HasSSE3 && V2IsUndef && NumElems == 4)
return getTargetShuffleNode(X86ISD::MOVSHDUP, dl, VT, V1, DAG);
- if (X86::isMOVSLDUPMask(SVOp) ||
- X86::isMOVHLPSMask(SVOp) ||
- X86::isMOVLPMask(SVOp))
+ if (X86::isMOVSLDUPMask(SVOp) && HasSSE3 && V2IsUndef && NumElems == 4)
+ return getTargetShuffleNode(X86ISD::MOVSLDUP, dl, VT, V1, DAG);
+
+ if (X86::isMOVLPMask(SVOp))
return Op;
}
Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=112661&r1=112660&r2=112661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Tue Aug 31 17:35:05 2010
@@ -134,7 +134,6 @@
def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
SDTCisSameAs<0,2>, SDTCisInt<3>]>;
-def SDTShuff1OpLd : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisPtrTy<1>]>;
def SDTShuff2OpLd : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
SDTCisPtrTy<2>]>;
@@ -157,11 +156,6 @@
def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
-def X86MovshdupLd : SDNode<"X86ISD::MOVSHDUP_LD", SDTShuff1OpLd,
- [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
-def X86MovsldupLd : SDNode<"X86ISD::MOVSLDUP_LD", SDTShuff1OpLd,
- [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
-
def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=112661&r1=112660&r2=112661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Aug 31 17:35:05 2010
@@ -5847,7 +5847,7 @@
// Shuffle with MOVSHDUP
def : Pat<(v4i32 (X86Movshdup VR128:$src)),
(MOVSHDUPrr VR128:$src)>;
-def : Pat<(v4i32 (X86Movshdup (bc_v4i32 (memopv2i64 addr:$src)))),
+def : Pat<(X86Movshdup (bc_v4i32 (memopv2i64 addr:$src))),
(MOVSHDUPrm addr:$src)>;
def : Pat<(v4f32 (X86Movshdup VR128:$src)),
@@ -5858,12 +5858,12 @@
// Shuffle with MOVSLDUP
def : Pat<(v4i32 (X86Movsldup VR128:$src)),
(MOVSLDUPrr VR128:$src)>;
-def : Pat<(v4i32 (X86MovsldupLd addr:$src)),
+def : Pat<(X86Movsldup (bc_v4i32 (memopv2i64 addr:$src))),
(MOVSLDUPrm addr:$src)>;
def : Pat<(v4f32 (X86Movsldup VR128:$src)),
(MOVSLDUPrr VR128:$src)>;
-def : Pat<(v4f32 (X86MovsldupLd addr:$src)),
+def : Pat<(X86Movsldup (memopv4f32 addr:$src)),
(MOVSLDUPrm addr:$src)>;
// Shuffle with PSHUFHW
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