[llvm-commits] [llvm] r112393 - in /llvm/trunk/lib/Target/ARM: ARMISelLowering.cpp ARMISelLowering.h ARMInstrThumb2.td

[Bill Wendling]

Hi Jim,

It's for a future optimization I have in mind. I want to generate good code for this function:

int x(int a) {
  if (a & 256)
    return -26;
  return 0;
}

Right now, we generate something like this:

    tst   r0, r0, 256
    mvn   r0, #25
    it    eq
    moveq r0, #0

gcc generates something like this:

    ands  r0, r0, 256
    it    ne
    mvnne r0, #25

I want to do this transformation during instruction selection time. So basically I have something like:

  (ARMISD::MOVCC CC, (ARMISD::CMPZ (and X, 256), 0), -26)

This will be converted to:

  (ARM::t2MOVCC nCC, -26, (ARM::t2ANDri X, 256))

where the ARM::t2ANDri instruction sets CPSR and the t2MOVCC acts upon that flag, and nCC is the opposite condcode of CC.

So, um, that's why. :-) It's vague and I'll talk to you in person more in depth...

-bw

On Aug 30, 2010, at 8:27 AM, Jim Grosbach wrote:

> Hi Bill,
> 
> I'm not sure I follow why this is needed. I'm probably just missing some context. Mind dropping by to enlighten me?
> 
> Thanks,
> -Jim
> 
> On Aug 28, 2010, at 8:02 PM, Bill Wendling wrote:
> 
>> Author: void
>> Date: Sat Aug 28 22:02:11 2010
>> New Revision: 112393
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=112393&view=rev
>> Log:
>> Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, but
>> it sets the CPSR register.
>> 
>> Modified:
>>   llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>   llvm/trunk/lib/Target/ARM/ARMISelLowering.h
>>   llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>> 
>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=112393&r1=112392&r2=112393&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Sat Aug 28 22:02:11 2010
>> @@ -609,6 +609,7 @@
>>  case ARMISD::BR2_JT:        return "ARMISD::BR2_JT";
>>  case ARMISD::RET_FLAG:      return "ARMISD::RET_FLAG";
>>  case ARMISD::PIC_ADD:       return "ARMISD::PIC_ADD";
>> +  case ARMISD::AND:           return "ARMISD::AND";
>>  case ARMISD::CMP:           return "ARMISD::CMP";
>>  case ARMISD::CMPZ:          return "ARMISD::CMPZ";
>>  case ARMISD::CMPFP:         return "ARMISD::CMPFP";
>> 
>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=112393&r1=112392&r2=112393&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Sat Aug 28 22:02:11 2010
>> @@ -47,6 +47,8 @@
>> 
>>      PIC_ADD,      // Add with a PC operand and a PIC label.
>> 
>> +      AND,          // ARM "and" instruction that sets the 's' flag in CPSR.
>> +
>>      CMP,          // ARM compare instructions.
>>      CMPZ,         // ARM compare that sets only Z flag.
>>      CMPFP,        // ARM VFP compare instruction, sets FPSCR.
>> 
>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=112393&r1=112392&r2=112393&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Sat Aug 28 22:02:11 2010
>> @@ -1631,6 +1631,10 @@
>> defm t2BIC  : T2I_bin_w_irs<0b0001, "bic",
>>                            BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
>> 
>> +let Defs = [CPSR] in
>> +defm t2ANDflag : T2I_bin_w_irs<0b0000, "and",
>> +                               BinOpFrag<(ARMand node:$LHS, node:$RHS)>, 1>;
>> +
>> let Constraints = "$src = $dst" in
>> def t2BFC : T2I<(outs rGPR:$dst), (ins rGPR:$src, bf_inv_mask_imm:$imm),
>>                IIC_iUNAsi, "bfc", "\t$dst, $imm",
>> 
>> 
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