[llvm-commits] [llvm] r112250 - in /llvm/trunk: lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/lock-inst-encoding.ll

[Daniel Dunbar]

Author: ddunbar
Date: Thu Aug 26 20:30:14 2010
New Revision: 112250

URL: http://llvm.org/viewvc/llvm-project?rev=112250&view=rev
Log:
X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler.

Added:
    llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll
Modified:
    llvm/trunk/lib/Target/X86/X86Instr64bit.td

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=112250&r1=112249&r2=112250&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Thu Aug 26 20:30:14 2010
@@ -1678,7 +1678,7 @@
 // Optimized codegen when the non-memory output is not used.
 let Defs = [EFLAGS], mayLoad = 1, mayStore = 1 in {
 // FIXME: Use normal add / sub instructions and add lock prefix dynamically.
-def LOCK_ADD64mr : RI<0x03, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
+def LOCK_ADD64mr : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
                       "lock\n\t"
                       "add{q}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
 def LOCK_ADD64mi8 : RIi8<0x83, MRM0m, (outs),

Added: llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll?rev=112250&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll (added)
+++ llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll Thu Aug 26 20:30:14 2010
@@ -0,0 +1,22 @@
+; RUN: llc -O0 --show-mc-encoding < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
+; CHECK: f0:
+; CHECK: addq %rax, (%rdi)
+; CHECK: # encoding: [0xf0,0x48,0x01,0x07]
+; CHECK: ret
+define void @f0(i64* %a0) {
+  %t0 = and i64 1, 1
+  call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind
+  %1 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %a0, i64 %t0) nounwind
+  call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind
+  ret void
+}
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32* nocapture, i32) nounwind
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind