[llvm-commits] [llvm] r111594 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

[Eric Christopher]

Author: echristo
Date: Thu Aug 19 19:36:24 2010
New Revision: 111594

URL: http://llvm.org/viewvc/llvm-project?rev=111594&view=rev
Log:
Fix loop conditionals (MO.isDef() asserts that it's a reg) and
move some constraints around.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111594&r1=111593&r2=111594&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Thu Aug 19 19:36:24 2010
@@ -122,7 +122,8 @@
   // Look to see if our OptionalDef is defining CPSR or CCR.
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (MO.isDef() && MO.isReg() && MO.getReg() == ARM::CPSR)
+    if (!MO.isReg() || !MO.isDef()) continue;
+    if (MO.getReg() == ARM::CPSR)
       *CPSR = true;
   }
   return true;