[llvm-commits] [llvm] r111518 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

[Eric Christopher]

Author: echristo
Date: Thu Aug 19 10:35:27 2010
New Revision: 111518

URL: http://llvm.org/viewvc/llvm-project?rev=111518&view=rev
Log:
Silence warning.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111518&r1=111517&r2=111518&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Thu Aug 19 10:35:27 2010
@@ -137,7 +137,7 @@
   
   // Do we optionally set a predicate?  Preds is size > 0 iff the predicate
   // defines CPSR. All other OptionalDefines in ARM are the CCR register.
-  bool CPSR;
+  bool CPSR = false;
   if (DefinesOptionalPredicate(MI, &CPSR)) {
     if (CPSR)
       AddDefaultT1CC(MIB);