[llvm-commits] PATCH: implement vector zext when vector types are legal (neon)

Nick Lewycky nlewycky at google.com
Tue Aug 17 15:58:10 PDT 2010

This patch implements custom lowering for ZEXT to N x i32 vector types.
Currently llvm just crashes.

I'm not very qualified either in the backend or with ARM assembly. Please
review carefully!

Since you're probably wondering, the code it produces is lengthy:

test1:                                  @ @test1
@ BB#0:
        str     r11, [sp, #-4]!
        mov     r11, sp
        sub     sp, sp, #28
        bic     sp, sp, #15
        vmov.i32        d0, #0x0
        vmov.u16        r2, d0[0]
        vmov    d0, r0, r1
        strh    r2, [sp, #14]
        strh    r2, [sp, #10]
        strh    r2, [sp, #6]
        strh    r2, [sp, #2]
        vmov.u16        r0, d0[3]
        vmov.u16        r2, d0[2]
        vmov.u16        r1, d0[1]
        strh    r0, [sp, #12]
        strh    r2, [sp, #8]
        vmov.u16        r2, d0[0]
        strh    r1, [sp, #4]
        mov     r1, sp
        strh    r2, [sp]
        vldmia  r1, {d0, d1}
        vmov    r0, r1, d0
        vmov    r2, r3, d1
        mov     sp, r11
        ldr     r11, [sp], #4
        mov     pc, lr

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