[llvm-commits] [llvm] r111068 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

[Bob Wilson]

Author: bwilson
Date: Fri Aug 13 22:18:29 2010
New Revision: 111068

URL: http://llvm.org/viewvc/llvm-project?rev=111068&view=rev
Log:
T2I_rbin_irs rr variant is for disassembly only, so don't provide a pattern.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=111068&r1=111067&r2=111068&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Fri Aug 13 22:18:29 2010
@@ -275,7 +275,7 @@
    // register
    def rr : T2sI<(outs rGPR:$dst), (ins rGPR:$rhs, rGPR:$lhs), IIC_iALUr,
                  opc, "\t$dst, $rhs, $lhs",
-                 [(set rGPR:$dst, (opnode rGPR:$lhs, rGPR:$rhs))]> {
+                 [/* For disassembly only; pattern left blank */]> {
      let Inst{31-27} = 0b11101;
      let Inst{26-25} = 0b01;
      let Inst{24-21} = opcod;