[llvm-commits] [llvm] r110446 - in /llvm/trunk: include/llvm/CodeGen/CallingConvLower.h include/llvm/Target/TargetCallingConv.td lib/Target/ARM/ARMCallingConv.td test/CodeGen/ARM/arguments.ll utils/TableGen/CallingConvEmitter.cpp

[Rafael Espindola]

Author: rafael
Date: Fri Aug  6 10:35:32 2010
New Revision: 110446

URL: http://llvm.org/viewvc/llvm-project?rev=110446&view=rev
Log:
Fix eabi calling convention when a 64 bit value shadows r3.

Without this what was happening was:

* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong

Modified:
    llvm/trunk/include/llvm/CodeGen/CallingConvLower.h
    llvm/trunk/include/llvm/Target/TargetCallingConv.td
    llvm/trunk/lib/Target/ARM/ARMCallingConv.td
    llvm/trunk/test/CodeGen/ARM/arguments.ll
    llvm/trunk/utils/TableGen/CallingConvEmitter.cpp

Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CallingConvLower.h?rev=110446&r1=110445&r2=110446&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/CallingConvLower.h (original)
+++ llvm/trunk/include/llvm/CodeGen/CallingConvLower.h Fri Aug  6 10:35:32 2010
@@ -275,6 +275,12 @@
     return Result;
   }
 
+  /// Version of AllocateStack with extra register to be shadowed.
+  unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
+    MarkAllocated(ShadowReg);
+    return AllocateStack(Size, Align);
+  }
+
   // HandleByVal - Allocate a stack slot large enough to pass an argument by
   // value. The size and alignment information of the argument is encoded in its
   // parameter attribute.

Modified: llvm/trunk/include/llvm/Target/TargetCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetCallingConv.td?rev=110446&r1=110445&r2=110446&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetCallingConv.td (original)
+++ llvm/trunk/include/llvm/Target/TargetCallingConv.td Fri Aug  6 10:35:32 2010
@@ -89,6 +89,13 @@
   int Align = align;
 }
 
+/// CCAssignToStackWithShadow - Same as CCAssignToStack, but with a register
+/// to be shadowed.
+class CCAssignToStackWithShadow<int size, int align, Register reg> :
+        CCAssignToStack<size, align> {
+  Register ShadowReg = reg;
+}
+
 /// CCPassByVal - This action always matches: it assigns the value to a stack
 /// slot to implement ByVal aggregate parameter passing. Size and alignment
 /// specify the minimum size and alignment for the stack slot.

Modified: llvm/trunk/lib/Target/ARM/ARMCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCallingConv.td?rev=110446&r1=110445&r2=110446&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCallingConv.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMCallingConv.td Fri Aug  6 10:35:32 2010
@@ -68,7 +68,7 @@
                        "ArgFlags.getOrigAlign() != 8",
                        CCAssignToReg<[R0, R1, R2, R3]>>>,
 
-  CCIfType<[i32], CCIfAlign<"8", CCAssignToStack<4, 8>>>,
+  CCIfType<[i32], CCIfAlign<"8", CCAssignToStackWithShadow<4, 8, R3>>>,
   CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
   CCIfType<[f64], CCAssignToStack<8, 8>>,
   CCIfType<[v2f64], CCAssignToStack<16, 8>>

Modified: llvm/trunk/test/CodeGen/ARM/arguments.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arguments.ll?rev=110446&r1=110445&r2=110446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arguments.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arguments.ll Fri Aug  6 10:35:32 2010
@@ -24,6 +24,20 @@
   ret i32 %.0
 }
 
+; test that on gnueabi a 64 bit value at this position will cause r3 to go
+; unused and the value stored in [sp]
+; ELF: f3:
+; ELF: ldr r0, [sp]
+; ELF-NEXT: mov pc, lr
+; DARWIN: f3:
+; DARWIN: mov r0, r3
+; DARWIN-NEXT: mov pc, lr
+define i32 @f3(i32 %i, i32 %j, i32 %k, i64 %l, ...) {
+entry:
+  %0 = trunc i64 %l to i32
+  ret i32 %0
+}
+
 declare i32 @g1(i64)
 
 declare i32 @g2(i32 %i, ...)

Modified: llvm/trunk/utils/TableGen/CallingConvEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CallingConvEmitter.cpp?rev=110446&r1=110445&r2=110446&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CallingConvEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/CallingConvEmitter.cpp Fri Aug  6 10:35:32 2010
@@ -169,6 +169,8 @@
       else
         O << "\n" << IndentStr << "  State.getTarget().getTargetData()"
           "->getABITypeAlignment(LocVT.getTypeForEVT(State.getContext()))";
+      if (Action->isSubClassOf("CCAssignToStackWithShadow"))
+        O << ", " << getQualifiedName(Action->getValueAsDef("ShadowReg"));
       O << ");\n" << IndentStr
         << "State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset"
         << Counter << ", LocVT, LocInfo));\n";