[llvm-commits] [llvm] r110424 - in /llvm/trunk: include/llvm/Target/Target.td include/llvm/Target/TargetInstrDesc.h utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp

[Bill Wendling]

Author: void
Date: Thu Aug  5 20:36:09 2010
New Revision: 110424

URL: http://llvm.org/viewvc/llvm-project?rev=110424&view=rev
Log:
Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn't
need the Compare flag after all.

--- Reverse-merging r109901 into '.':
U    include/llvm/Target/TargetInstrDesc.h
U    include/llvm/Target/Target.td
U    utils/TableGen/InstrInfoEmitter.cpp
U    utils/TableGen/CodeGenInstruction.cpp
U    utils/TableGen/CodeGenInstruction.h


Modified:
    llvm/trunk/include/llvm/Target/Target.td
    llvm/trunk/include/llvm/Target/TargetInstrDesc.h
    llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
    llvm/trunk/utils/TableGen/CodeGenInstruction.h
    llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/Target.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=110424&r1=110423&r2=110424&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/Target.td (original)
+++ llvm/trunk/include/llvm/Target/Target.td Thu Aug  5 20:36:09 2010
@@ -198,7 +198,6 @@
   bit isReturn     = 0;     // Is this instruction a return instruction?
   bit isBranch     = 0;     // Is this instruction a branch instruction?
   bit isIndirectBranch = 0; // Is this instruction an indirect branch?
-  bit isCompare    = 0;     // Is this instruction a comparison instruction?
   bit isBarrier    = 0;     // Can control flow fall through this instruction?
   bit isCall       = 0;     // Is this instruction a call instruction?
   bit canFoldAsLoad = 0;    // Can this be folded as a simple memory operand?

Modified: llvm/trunk/include/llvm/Target/TargetInstrDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrDesc.h?rev=110424&r1=110423&r2=110424&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrDesc.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrDesc.h Thu Aug  5 20:36:09 2010
@@ -105,7 +105,6 @@
     IndirectBranch,
     Predicable,
     NotDuplicable,
-    Compare,
     DelaySlot,
     FoldableAsLoad,
     MayLoad,
@@ -316,7 +315,7 @@
   bool isIndirectBranch() const {
     return Flags & (1 << TID::IndirectBranch);
   }
-
+  
   /// isConditionalBranch - Return true if this is a branch which may fall
   /// through to the next instruction or may transfer control flow to some other
   /// block.  The TargetInstrInfo::AnalyzeBranch method can be used to get more
@@ -341,11 +340,6 @@
     return Flags & (1 << TID::Predicable);
   }
   
-  /// isCompare - Return true if this instruction is a comparison.
-  bool isCompare() const {
-    return Flags & (1 << TID::Compare);
-  }
-  
   /// isNotDuplicable - Return true if this instruction cannot be safely
   /// duplicated.  For example, if the instruction has a unique labels attached
   /// to it, duplicating it would cause multiple definition errors.

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=110424&r1=110423&r2=110424&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Thu Aug  5 20:36:09 2010
@@ -102,7 +102,6 @@
   isReturn     = R->getValueAsBit("isReturn");
   isBranch     = R->getValueAsBit("isBranch");
   isIndirectBranch = R->getValueAsBit("isIndirectBranch");
-  isCompare    = R->getValueAsBit("isCompare");
   isBarrier    = R->getValueAsBit("isBarrier");
   isCall       = R->getValueAsBit("isCall");
   canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=110424&r1=110423&r2=110424&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Thu Aug  5 20:36:09 2010
@@ -123,7 +123,6 @@
     bool isReturn;
     bool isBranch;
     bool isIndirectBranch;
-    bool isCompare;
     bool isBarrier;
     bool isCall;
     bool canFoldAsLoad;

Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=110424&r1=110423&r2=110424&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Thu Aug  5 20:36:09 2010
@@ -270,7 +270,6 @@
   if (Inst.isReturn)           OS << "|(1<<TID::Return)";
   if (Inst.isBranch)           OS << "|(1<<TID::Branch)";
   if (Inst.isIndirectBranch)   OS << "|(1<<TID::IndirectBranch)";
-  if (Inst.isCompare)          OS << "|(1<<TID::Compare)";
   if (Inst.isBarrier)          OS << "|(1<<TID::Barrier)";
   if (Inst.hasDelaySlot)       OS << "|(1<<TID::DelaySlot)";
   if (Inst.isCall)             OS << "|(1<<TID::Call)";