[llvm-commits] [llvm] r110371 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp

[Eric Christopher]

Author: echristo
Date: Thu Aug  5 15:04:36 2010
New Revision: 110371

URL: http://llvm.org/viewvc/llvm-project?rev=110371&view=rev
Log:
Handle the memory barrier pseudo that goes to nothing for the JIT.

Modified:
    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=110371&r1=110370&r2=110371&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Thu Aug  5 15:04:36 2010
@@ -705,6 +705,12 @@
       llvm_unreachable("psuedo instructions should be removed before code"
                        " emission");
       break;
+    // Do nothing for Int_MemBarrier - it's just a comment.  Add a debug
+    // to make it slightly easier to see.
+    case X86::Int_MemBarrier:
+      DEBUG(dbgs() << "#MEMBARRIER\n");
+      break;
+    
     case TargetOpcode::INLINEASM:
       // We allow inline assembler nodes with empty bodies - they can
       // implicitly define registers, which is ok for JIT.
@@ -716,7 +722,7 @@
     case TargetOpcode::EH_LABEL:
       MCE.emitLabel(MI.getOperand(0).getMCSymbol());
       break;
-        
+    
     case TargetOpcode::IMPLICIT_DEF:
     case TargetOpcode::KILL:
       break;