[llvm-commits] [llvm] r110274 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86Instr64bit.td X86InstrInfo.td

[Eric Christopher]

Author: echristo
Date: Wed Aug  4 18:03:04 2010
New Revision: 110274

URL: http://llvm.org/viewvc/llvm-project?rev=110274&view=rev
Log:
Make x86-64 membarriers work without sse and clean up some of the
uses.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86Instr64bit.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=110274&r1=110273&r2=110274&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug  4 18:03:04 2010
@@ -7654,9 +7654,12 @@
 SDValue X86TargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const{
   DebugLoc dl = Op.getDebugLoc();
   
-  if (!Subtarget->hasSSE2())
+  if (!Subtarget->hasSSE2()) {
+    SDValue Zero = DAG.getConstant(0,
+                                   Subtarget->is64Bit() ? MVT::i64 : MVT::i32);
     return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0),
-                       DAG.getConstant(0, MVT::i32));
+                       Zero);
+  }
   
   unsigned isDev = cast<ConstantSDNode>(Op.getOperand(5))->getZExtValue();
   if(!isDev)

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=110274&r1=110273&r2=110274&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Wed Aug  4 18:03:04 2010
@@ -1619,6 +1619,13 @@
 // Atomic Instructions
 //===----------------------------------------------------------------------===//
 
+// TODO: Get this to fold the constant into the instruction.           
+let Defs = [ESP] in
+def Int_MemBarrierNoSSE64  : RI<0x09, MRM1r, (outs), (ins GR64:$zero),
+                           "lock\n\t"
+                           "or{q}\t{$zero, (%rsp)|(%rsp), $zero}",
+                           [(X86MemBarrierNoSSE GR64:$zero)]>, LOCK;
+
 let Defs = [RAX, EFLAGS], Uses = [RAX] in {
 def LCMPXCHG64 : RI<0xB1, MRMDestMem, (outs), (ins i64mem:$ptr, GR64:$swap),
                "lock\n\t"

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=110274&r1=110273&r2=110274&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Aug  4 18:03:04 2010
@@ -3934,8 +3934,8 @@
                      [(X86MemBarrier)]>, Requires<[HasSSE2]>;
 
 // TODO: Get this to fold the constant into the instruction.           
-let Uses = [ESP] in
-def Int_MemBarrierNoSSE  : I<0x0B, Pseudo, (outs), (ins GR32:$zero),
+let Defs = [ESP] in
+def Int_MemBarrierNoSSE  : I<0x09, MRM1r, (outs), (ins GR32:$zero),
                            "lock\n\t"
                            "or{l}\t{$zero, (%esp)|(%esp), $zero}",
                            [(X86MemBarrierNoSSE GR32:$zero)]>, LOCK;