[llvm-commits] [llvm] r110038 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/CellSPU/SPUInstrInfo.td test/CodeGen/CellSPU/v2f32.ll

[Kalle Raiskila]

Author: kraiskil
Date: Mon Aug  2 06:22:10 2010
New Revision: 110038

URL: http://llvm.org/viewvc/llvm-project?rev=110038&view=rev
Log:
More SPU v2f32 stuff added: insertelement and shuffle.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
    llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td
    llvm/trunk/test/CodeGen/CellSPU/v2f32.ll

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=110038&r1=110037&r2=110038&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Aug  2 06:22:10 2010
@@ -1624,6 +1624,7 @@
     SDValue T = DAG.getConstant(unsigned(SplatBits), VT.getVectorElementType());
     return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, T, T, T, T);
   }
+  case MVT::v2f32:
   case MVT::v2i32: {
     return SDValue();
   }

Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=110038&r1=110037&r2=110038&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Mon Aug  2 06:22:10 2010
@@ -1584,6 +1584,9 @@
 def : Pat<(v4f32 (SPUprefslot2vec R32FP:$rA)),
           (ORv4f32_f32 R32FP:$rA)>;
 
+def : Pat<(v2f32 (SPUprefslot2vec R32FP:$rA)),
+          (ORv4f32_f32 R32FP:$rA)>;
+
 def : Pat<(v2f64 (SPUprefslot2vec R64FP:$rA)),
           (ORv2f64_f64 R64FP:$rA)>;
 
@@ -1608,6 +1611,9 @@
 def : Pat<(SPUvec2prefslot (v4f32 VECREG:$rA)),
           (ORf32_v4f32 VECREG:$rA)>;
 
+def : Pat<(SPUvec2prefslot (v2f32 VECREG:$rA)),
+          (ORf32_v4f32 VECREG:$rA)>;
+
 def : Pat<(SPUvec2prefslot (v2f64 VECREG:$rA)),
           (ORf64_v2f64 VECREG:$rA)>;
 
@@ -2150,6 +2156,8 @@
 
   def v4f32     : SHUFBVecInst<v4f32, v16i8>;
   def v4f32_m32 : SHUFBVecInst<v4f32, v4i32>;
+  def v2f32     : SHUFBVecInst<v2f32, v16i8>;
+  def v2f32_m32 : SHUFBVecInst<v2f32, v4i32>;
 
   def v2f64     : SHUFBVecInst<v2f64, v16i8>;
   def v2f64_m32 : SHUFBVecInst<v2f64, v4i32>;

Modified: llvm/trunk/test/CodeGen/CellSPU/v2f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/v2f32.ll?rev=110038&r1=110037&r2=110038&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/v2f32.ll (original)
+++ llvm/trunk/test/CodeGen/CellSPU/v2f32.ll Mon Aug  2 06:22:10 2010
@@ -33,3 +33,13 @@
  ret %vec %1
 }
 
+define %vec @test_splat(float %param ) {
+;CHECK: lqa
+;CHECK: shufb
+  %sv = insertelement <1 x float> undef, float %param, i32 0 
+  %rv = shufflevector <1 x float> %sv, <1 x float> undef, <2 x i32> zeroinitializer 
+;CHECK: bi $lr
+  ret %vec %rv
+}
+
+