[llvm-commits] [llvm] r109901 - in /llvm/trunk: include/llvm/Target/Target.td include/llvm/Target/TargetInstrDesc.h utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp

[Bill Wendling]

Author: void
Date: Fri Jul 30 17:48:39 2010
New Revision: 109901

URL: http://llvm.org/viewvc/llvm-project?rev=109901&view=rev
Log:
Add a "Compare" flag to the target instruction descriptor. This will be used
later to identify and possibly remove superfluous compare instructions -- those
that are testing for and setting a status flag that should already be set.

Modified:
    llvm/trunk/include/llvm/Target/Target.td
    llvm/trunk/include/llvm/Target/TargetInstrDesc.h
    llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
    llvm/trunk/utils/TableGen/CodeGenInstruction.h
    llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/Target.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=109901&r1=109900&r2=109901&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/Target.td (original)
+++ llvm/trunk/include/llvm/Target/Target.td Fri Jul 30 17:48:39 2010
@@ -198,6 +198,7 @@
   bit isReturn     = 0;     // Is this instruction a return instruction?
   bit isBranch     = 0;     // Is this instruction a branch instruction?
   bit isIndirectBranch = 0; // Is this instruction an indirect branch?
+  bit isCompare    = 0;     // Is this instruction a comparison instruction?
   bit isBarrier    = 0;     // Can control flow fall through this instruction?
   bit isCall       = 0;     // Is this instruction a call instruction?
   bit canFoldAsLoad = 0;    // Can this be folded as a simple memory operand?

Modified: llvm/trunk/include/llvm/Target/TargetInstrDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrDesc.h?rev=109901&r1=109900&r2=109901&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrDesc.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrDesc.h Fri Jul 30 17:48:39 2010
@@ -105,6 +105,7 @@
     IndirectBranch,
     Predicable,
     NotDuplicable,
+    Compare,
     DelaySlot,
     FoldableAsLoad,
     MayLoad,
@@ -315,7 +316,7 @@
   bool isIndirectBranch() const {
     return Flags & (1 << TID::IndirectBranch);
   }
-  
+
   /// isConditionalBranch - Return true if this is a branch which may fall
   /// through to the next instruction or may transfer control flow to some other
   /// block.  The TargetInstrInfo::AnalyzeBranch method can be used to get more
@@ -340,6 +341,11 @@
     return Flags & (1 << TID::Predicable);
   }
   
+  /// isCompare - Return true if this instruction is a comparison.
+  bool isCompare() const {
+    return Flags & (1 << TID::Compare);
+  }
+  
   /// isNotDuplicable - Return true if this instruction cannot be safely
   /// duplicated.  For example, if the instruction has a unique labels attached
   /// to it, duplicating it would cause multiple definition errors.

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=109901&r1=109900&r2=109901&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Fri Jul 30 17:48:39 2010
@@ -102,6 +102,7 @@
   isReturn     = R->getValueAsBit("isReturn");
   isBranch     = R->getValueAsBit("isBranch");
   isIndirectBranch = R->getValueAsBit("isIndirectBranch");
+  isCompare    = R->getValueAsBit("isCompare");
   isBarrier    = R->getValueAsBit("isBarrier");
   isCall       = R->getValueAsBit("isCall");
   canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=109901&r1=109900&r2=109901&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Fri Jul 30 17:48:39 2010
@@ -123,6 +123,7 @@
     bool isReturn;
     bool isBranch;
     bool isIndirectBranch;
+    bool isCompare;
     bool isBarrier;
     bool isCall;
     bool canFoldAsLoad;

Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=109901&r1=109900&r2=109901&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Fri Jul 30 17:48:39 2010
@@ -270,6 +270,7 @@
   if (Inst.isReturn)           OS << "|(1<<TID::Return)";
   if (Inst.isBranch)           OS << "|(1<<TID::Branch)";
   if (Inst.isIndirectBranch)   OS << "|(1<<TID::IndirectBranch)";
+  if (Inst.isCompare)          OS << "|(1<<TID::Compare)";
   if (Inst.isBarrier)          OS << "|(1<<TID::Barrier)";
   if (Inst.hasDelaySlot)       OS << "|(1<<TID::DelaySlot)";
   if (Inst.isCall)             OS << "|(1<<TID::Call)";