[llvm-commits] [llvm] r109572 - /llvm/trunk/utils/TableGen/FastISelEmitter.cpp

[Eric Christopher]

Author: echristo
Date: Tue Jul 27 20:52:23 2010
New Revision: 109572

URL: http://llvm.org/viewvc/llvm-project?rev=109572&view=rev
Log:
Filter out patterns that have PredicateOperands.

Modified:
    llvm/trunk/utils/TableGen/FastISelEmitter.cpp

Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/FastISelEmitter.cpp?rev=109572&r1=109571&r2=109572&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/FastISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/FastISelEmitter.cpp Tue Jul 27 20:52:23 2010
@@ -54,6 +54,7 @@
   bool initialize(TreePatternNode *InstPatNode,
                   const CodeGenTarget &Target,
                   MVT::SimpleValueType VT) {
+
     if (!InstPatNode->isLeaf()) {
       if (InstPatNode->getOperator()->getName() == "imm") {
         Operands.push_back("i");
@@ -69,6 +70,7 @@
     
     for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
       TreePatternNode *Op = InstPatNode->getChild(i);
+      
       // For now, filter out any operand with a predicate.
       // For now, filter out any operand with multiple values.
       if (!Op->getPredicateFns().empty() ||
@@ -105,6 +107,7 @@
         RC = Target.getRegisterClassForRegister(OpLeafRec);
       else
         return false;
+        
       // For now, require the register operands' register classes to all
       // be the same.
       if (!RC)
@@ -262,6 +265,15 @@
     if (II.OperandList.empty())
       continue;
 
+    // For now ignore instructions that have predicate operands.
+    bool HasPredicate = false;
+    for (unsigned i = 0, e = II.OperandList.size(); i != e; ++i) {
+      if(II.OperandList[i].Rec->isSubClassOf("PredicateOperand"))
+        HasPredicate = true;
+    }
+    if (HasPredicate)
+      continue;
+      
     // For now, ignore multi-instruction patterns.
     bool MultiInsts = false;
     for (unsigned i = 0, e = Dst->getNumChildren(); i != e; ++i) {