[llvm-commits] [llvm] r108765 - in /llvm/trunk: lib/CodeGen/SelectionDAG/FastISel.cpp test/CodeGen/X86/fast-isel-atomic.ll

[Dan Gohman]

Author: djg
Date: Mon Jul 19 17:48:56 2010
New Revision: 108765

URL: http://llvm.org/viewvc/llvm-project?rev=108765&view=rev
Log:
After a custom inserter, in a block which has constant instructions,
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.

Added:
    llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=108765&r1=108764&r2=108765&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Mon Jul 19 17:48:56 2010
@@ -276,6 +276,7 @@
 void FastISel::recomputeInsertPt() {
   if (getLastLocalValue()) {
     FuncInfo.InsertPt = getLastLocalValue();
+    FuncInfo.MBB = FuncInfo.InsertPt->getParent();
     ++FuncInfo.InsertPt;
   } else
     FuncInfo.InsertPt = FuncInfo.MBB->getFirstNonPHI();

Added: llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll?rev=108765&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll (added)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll Mon Jul 19 17:48:56 2010
@@ -0,0 +1,16 @@
+; RUN: llc < %s -O0 -march=x86-64
+; rdar://8204072
+
+ at sc = external global i8
+ at uc = external global i8
+
+declare i8 @llvm.atomic.load.and.i8.p0i8(i8* nocapture, i8) nounwind
+
+define void @test_fetch_and_op() nounwind {
+entry:
+  %tmp40 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+  store i8 %tmp40, i8* @sc
+  %tmp41 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+  store i8 %tmp41, i8* @uc
+  ret void
+}