[llvm-commits] [llvm] r108496 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/fast-isel-gep.ll test/CodeGen/X86/fast-isel-shift-imm.ll

[Dan Gohman]

Author: djg
Date: Thu Jul 15 21:01:19 2010
New Revision: 108496

URL: http://llvm.org/viewvc/llvm-project?rev=108496&view=rev
Log:
Use the source-order scheduler instead of the "fast" scheduler at -O0,
because it's more likely to keep debug line information in its original
order.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
    llvm/trunk/test/CodeGen/X86/fast-isel-shift-imm.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=108496&r1=108495&r2=108496&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jul 15 21:01:19 2010
@@ -132,7 +132,7 @@
     const TargetLowering &TLI = IS->getTargetLowering();
 
     if (OptLevel == CodeGenOpt::None)
-      return createFastDAGScheduler(IS, OptLevel);
+      return createSourceListDAGScheduler(IS, OptLevel);
     if (TLI.getSchedulingPreference() == Sched::Latency)
       return createTDListDAGScheduler(IS, OptLevel);
     if (TLI.getSchedulingPreference() == Sched::RegPressure)

Modified: llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll?rev=108496&r1=108495&r2=108496&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll Thu Jul 15 21:01:19 2010
@@ -9,7 +9,7 @@
        %t15 = load i32* %t9            ; <i32> [#uses=1]
        ret i32 %t15
 ; X32: test1:
-; X32:  	movl	(%ecx,%eax,4), %eax
+; X32:  	movl	(%eax,%ecx,4), %eax
 ; X32:  	ret
 
 ; X64: test1:
@@ -23,7 +23,7 @@
        %t15 = load i32* %t9            ; <i32> [#uses=1]
        ret i32 %t15
 ; X32: test2:
-; X32:  	movl	(%eax,%ecx,4), %eax
+; X32:  	movl	(%edx,%ecx,4), %eax
 ; X32:  	ret
 
 ; X64: test2:

Modified: llvm/trunk/test/CodeGen/X86/fast-isel-shift-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-shift-imm.ll?rev=108496&r1=108495&r2=108496&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-shift-imm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-shift-imm.ll Thu Jul 15 21:01:19 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -O0 | grep {sarl	\$80, %eax}
+; RUN: llc < %s -march=x86 -O0 | grep {sarl	\$80, %e}
 ; PR3242
 
 define void @foo(i32 %x, i32* %p) nounwind {