[llvm-commits] [llvm] r108207 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/MC/AsmParser/X86/x86_32-encoding.s test/MC/AsmParser/X86/x86_64-encoding.s
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Mon Jul 12 16:04:15 PDT 2010
Author: bruno
Date: Mon Jul 12 18:04:15 2010
New Revision: 108207
URL: http://llvm.org/viewvc/llvm-project?rev=108207&view=rev
Log:
Add AVX 256 binary arithmetic instructions
Modified:
llvm/trunk/lib/Target/X86/X86InstrSSE.td
llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s
llvm/trunk/test/MC/AsmParser/X86/x86_64-encoding.s
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=108207&r1=108206&r2=108207&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Jul 12 18:04:15 2010
@@ -1810,6 +1810,16 @@
}
}
+multiclass basic_sse12_fp_binop_p_y<bits<8> opc, string OpcodeStr,
+ SDNode OpNode> {
+ let mayLoad = 0 in {
+ defm PSY : sse12_fp_packed<opc, !strconcat(OpcodeStr, "ps"), OpNode, VR256,
+ v8f32, f256mem, memopv8f32, SSEPackedSingle, 0>, TB;
+ defm PDY : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR256,
+ v4f64, f256mem, memopv4f64, SSEPackedDouble, 0>, TB, OpSize;
+ }
+}
+
multiclass basic_sse12_fp_binop_s_int<bits<8> opc, string OpcodeStr,
bit Is2Addr = 1> {
defm SS : sse12_fp_scalar_int<opc, OpcodeStr, VR128,
@@ -1829,22 +1839,28 @@
SSEPackedDouble, Is2Addr>, TB, OpSize;
}
-// Arithmetic instructions
+// Binary Arithmetic instructions
let isAsmParserOnly = 1, Predicates = [HasAVX] in {
defm VADD : basic_sse12_fp_binop_s<0x58, "add", fadd, 0>,
- basic_sse12_fp_binop_p<0x58, "add", fadd, 0>, VEX_4V;
+ basic_sse12_fp_binop_p<0x58, "add", fadd, 0>,
+ basic_sse12_fp_binop_p_y<0x58, "add", fadd>, VEX_4V;
defm VMUL : basic_sse12_fp_binop_s<0x59, "mul", fmul, 0>,
- basic_sse12_fp_binop_p<0x59, "mul", fmul, 0>, VEX_4V;
+ basic_sse12_fp_binop_p<0x59, "mul", fmul, 0>,
+ basic_sse12_fp_binop_p_y<0x59, "mul", fmul>, VEX_4V;
let isCommutable = 0 in {
defm VSUB : basic_sse12_fp_binop_s<0x5C, "sub", fsub, 0>,
- basic_sse12_fp_binop_p<0x5C, "sub", fsub, 0>, VEX_4V;
+ basic_sse12_fp_binop_p<0x5C, "sub", fsub, 0>,
+ basic_sse12_fp_binop_p_y<0x5C, "sub", fsub>, VEX_4V;
defm VDIV : basic_sse12_fp_binop_s<0x5E, "div", fdiv, 0>,
- basic_sse12_fp_binop_p<0x5E, "div", fdiv, 0>, VEX_4V;
+ basic_sse12_fp_binop_p<0x5E, "div", fdiv, 0>,
+ basic_sse12_fp_binop_p_y<0x5E, "div", fdiv>, VEX_4V;
defm VMAX : basic_sse12_fp_binop_s<0x5F, "max", X86fmax, 0>,
- basic_sse12_fp_binop_p<0x5F, "max", X86fmax, 0>, VEX_4V;
+ basic_sse12_fp_binop_p<0x5F, "max", X86fmax, 0>,
+ basic_sse12_fp_binop_p_y<0x5F, "max", X86fmax>, VEX_4V;
defm VMIN : basic_sse12_fp_binop_s<0x5D, "min", X86fmin, 0>,
- basic_sse12_fp_binop_p<0x5D, "min", X86fmin, 0>, VEX_4V;
+ basic_sse12_fp_binop_p<0x5D, "min", X86fmin, 0>,
+ basic_sse12_fp_binop_p_y<0x5D, "min", X86fmin>, VEX_4V;
}
}
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s?rev=108207&r1=108206&r2=108207&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s Mon Jul 12 18:04:15 2010
@@ -12406,3 +12406,99 @@
// CHECK: encoding: [0xc5,0xf9,0x50,0xc2]
vmovmskpd %xmm2, %eax
+// CHECK: vmaxps %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5f,0xf2]
+ vmaxps %ymm2, %ymm4, %ymm6
+
+// CHECK: vmaxpd %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5f,0xf2]
+ vmaxpd %ymm2, %ymm4, %ymm6
+
+// CHECK: vminps %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5d,0xf2]
+ vminps %ymm2, %ymm4, %ymm6
+
+// CHECK: vminpd %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5d,0xf2]
+ vminpd %ymm2, %ymm4, %ymm6
+
+// CHECK: vsubps %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5c,0xf2]
+ vsubps %ymm2, %ymm4, %ymm6
+
+// CHECK: vsubpd %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5c,0xf2]
+ vsubpd %ymm2, %ymm4, %ymm6
+
+// CHECK: vdivps %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5e,0xf2]
+ vdivps %ymm2, %ymm4, %ymm6
+
+// CHECK: vdivpd %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5e,0xf2]
+ vdivpd %ymm2, %ymm4, %ymm6
+
+// CHECK: vaddps %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x58,0xf2]
+ vaddps %ymm2, %ymm4, %ymm6
+
+// CHECK: vaddpd %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x58,0xf2]
+ vaddpd %ymm2, %ymm4, %ymm6
+
+// CHECK: vmulps %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x59,0xf2]
+ vmulps %ymm2, %ymm4, %ymm6
+
+// CHECK: vmulpd %ymm2, %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x59,0xf2]
+ vmulpd %ymm2, %ymm4, %ymm6
+
+// CHECK: vmaxps (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5f,0x30]
+ vmaxps (%eax), %ymm4, %ymm6
+
+// CHECK: vmaxpd (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5f,0x30]
+ vmaxpd (%eax), %ymm4, %ymm6
+
+// CHECK: vminps (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5d,0x30]
+ vminps (%eax), %ymm4, %ymm6
+
+// CHECK: vminpd (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5d,0x30]
+ vminpd (%eax), %ymm4, %ymm6
+
+// CHECK: vsubps (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5c,0x30]
+ vsubps (%eax), %ymm4, %ymm6
+
+// CHECK: vsubpd (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5c,0x30]
+ vsubpd (%eax), %ymm4, %ymm6
+
+// CHECK: vdivps (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5e,0x30]
+ vdivps (%eax), %ymm4, %ymm6
+
+// CHECK: vdivpd (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5e,0x30]
+ vdivpd (%eax), %ymm4, %ymm6
+
+// CHECK: vaddps (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x58,0x30]
+ vaddps (%eax), %ymm4, %ymm6
+
+// CHECK: vaddpd (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x58,0x30]
+ vaddpd (%eax), %ymm4, %ymm6
+
+// CHECK: vmulps (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x59,0x30]
+ vmulps (%eax), %ymm4, %ymm6
+
+// CHECK: vmulpd (%eax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x59,0x30]
+ vmulpd (%eax), %ymm4, %ymm6
+
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_64-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_64-encoding.s?rev=108207&r1=108206&r2=108207&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_64-encoding.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_64-encoding.s Mon Jul 12 18:04:15 2010
@@ -2480,3 +2480,99 @@
// CHECK: encoding: [0xc4,0xc1,0x79,0x50,0xc4]
vmovmskpd %xmm12, %eax
+// CHECK: vmaxps %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5c,0x5f,0xf4]
+ vmaxps %ymm12, %ymm4, %ymm6
+
+// CHECK: vmaxpd %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5d,0x5f,0xf4]
+ vmaxpd %ymm12, %ymm4, %ymm6
+
+// CHECK: vminps %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5c,0x5d,0xf4]
+ vminps %ymm12, %ymm4, %ymm6
+
+// CHECK: vminpd %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5d,0x5d,0xf4]
+ vminpd %ymm12, %ymm4, %ymm6
+
+// CHECK: vsubps %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5c,0x5c,0xf4]
+ vsubps %ymm12, %ymm4, %ymm6
+
+// CHECK: vsubpd %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5d,0x5c,0xf4]
+ vsubpd %ymm12, %ymm4, %ymm6
+
+// CHECK: vdivps %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5c,0x5e,0xf4]
+ vdivps %ymm12, %ymm4, %ymm6
+
+// CHECK: vdivpd %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5d,0x5e,0xf4]
+ vdivpd %ymm12, %ymm4, %ymm6
+
+// CHECK: vaddps %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5c,0x58,0xf4]
+ vaddps %ymm12, %ymm4, %ymm6
+
+// CHECK: vaddpd %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5d,0x58,0xf4]
+ vaddpd %ymm12, %ymm4, %ymm6
+
+// CHECK: vmulps %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5c,0x59,0xf4]
+ vmulps %ymm12, %ymm4, %ymm6
+
+// CHECK: vmulpd %ymm12, %ymm4, %ymm6
+// CHECK: encoding: [0xc4,0xc1,0x5d,0x59,0xf4]
+ vmulpd %ymm12, %ymm4, %ymm6
+
+// CHECK: vmaxps (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5f,0x30]
+ vmaxps (%rax), %ymm4, %ymm6
+
+// CHECK: vmaxpd (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5f,0x30]
+ vmaxpd (%rax), %ymm4, %ymm6
+
+// CHECK: vminps (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5d,0x30]
+ vminps (%rax), %ymm4, %ymm6
+
+// CHECK: vminpd (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5d,0x30]
+ vminpd (%rax), %ymm4, %ymm6
+
+// CHECK: vsubps (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5c,0x30]
+ vsubps (%rax), %ymm4, %ymm6
+
+// CHECK: vsubpd (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5c,0x30]
+ vsubpd (%rax), %ymm4, %ymm6
+
+// CHECK: vdivps (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x5e,0x30]
+ vdivps (%rax), %ymm4, %ymm6
+
+// CHECK: vdivpd (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x5e,0x30]
+ vdivpd (%rax), %ymm4, %ymm6
+
+// CHECK: vaddps (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x58,0x30]
+ vaddps (%rax), %ymm4, %ymm6
+
+// CHECK: vaddpd (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x58,0x30]
+ vaddpd (%rax), %ymm4, %ymm6
+
+// CHECK: vmulps (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdc,0x59,0x30]
+ vmulps (%rax), %ymm4, %ymm6
+
+// CHECK: vmulpd (%rax), %ymm4, %ymm6
+// CHECK: encoding: [0xc5,0xdd,0x59,0x30]
+ vmulpd (%rax), %ymm4, %ymm6
+
More information about the llvm-commits
mailing list