[llvm-commits] [llvm] r108115 - in /llvm/trunk/lib: CodeGen/VirtRegRewriter.cpp Target/X86/X86InstrInfo.cpp

[Rafael Espindola]

Author: rafael
Date: Sun Jul 11 19:52:33 2010
New Revision: 108115

URL: http://llvm.org/viewvc/llvm-project?rev=108115&view=rev
Log:
Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to
getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.

Update getLoadStoreRegOpcode to handle GR32_AD.

Modified:
    llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=108115&r1=108114&r2=108115&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Sun Jul 11 19:52:33 2010
@@ -1703,7 +1703,7 @@
   std::vector<unsigned> &EmSpills = VRM->getEmergencySpills(MI);
   for (unsigned i = 0, e = EmSpills.size(); i != e; ++i) {
     unsigned PhysReg = EmSpills[i];
-    const TargetRegisterClass *RC = TRI->getPhysicalRegisterRegClass(PhysReg);
+    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(PhysReg);
     assert(RC && "Unable to determine register class!");
     int SS = VRM->getEmergencySpillSlot(RC);
     if (UsedSS.count(SS))

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=108115&r1=108114&r2=108115&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sun Jul 11 19:52:33 2010
@@ -1960,7 +1960,8 @@
                                       bool load) {
   if (RC == &X86::GR64RegClass || RC == &X86::GR64_NOSPRegClass) {
     return load ? X86::MOV64rm : X86::MOV64mr;
-  } else if (RC == &X86::GR32RegClass || RC == &X86::GR32_NOSPRegClass) {
+  } else if (RC == &X86::GR32RegClass || RC == &X86::GR32_NOSPRegClass ||
+             RC == &X86::GR32_ADRegClass) {
     return load ? X86::MOV32rm : X86::MOV32mr;
   } else if (RC == &X86::GR16RegClass) {
     return load ? X86::MOV16rm : X86::MOV16mr;