[llvm-commits] [llvm] r108087 - in /llvm/trunk/lib/Target/XCore: XCoreInstrInfo.cpp XCoreInstrInfo.h
Jakob Stoklund Olesen
stoklund at 2pi.dk
Sun Jul 11 00:56:13 PDT 2010
Author: stoklund
Date: Sun Jul 11 02:56:13 2010
New Revision: 108087
URL: http://llvm.org/viewvc/llvm-project?rev=108087&view=rev
Log:
Replace copyRegToReg with copyPhysReg for XCore.
Modified:
llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp?rev=108087&r1=108086&r2=108087&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp Sun Jul 11 02:56:13 2010
@@ -356,37 +356,31 @@
return 2;
}
-bool XCoreInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator I,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *DestRC,
- const TargetRegisterClass *SrcRC,
- DebugLoc DL) const {
-
- if (DestRC == SrcRC) {
- if (DestRC == XCore::GRRegsRegisterClass) {
- BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg)
- .addReg(SrcReg)
- .addImm(0);
- return true;
- } else {
- return false;
- }
+void XCoreInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I, DebugLoc DL,
+ unsigned DestReg, unsigned SrcReg,
+ bool KillSrc) const {
+ bool GRDest = XCore::GRRegsRegClass.contains(DestReg);
+ bool GRSrc = XCore::GRRegsRegClass.contains(SrcReg);
+
+ if (GRDest && GRSrc) {
+ BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg)
+ .addReg(SrcReg, getKillRegState(KillSrc))
+ .addImm(0);
+ return;
}
- if (SrcRC == XCore::RRegsRegisterClass && SrcReg == XCore::SP &&
- DestRC == XCore::GRRegsRegisterClass) {
- BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg)
- .addImm(0);
- return true;
+ if (GRDest && SrcReg == XCore::SP) {
+ BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0);
+ return;
}
- if (DestRC == XCore::RRegsRegisterClass && DestReg == XCore::SP &&
- SrcRC == XCore::GRRegsRegisterClass) {
+
+ if (DestReg == XCore::SP && GRSrc) {
BuildMI(MBB, I, DL, get(XCore::SETSP_1r))
- .addReg(SrcReg);
- return true;
+ .addReg(SrcReg, getKillRegState(KillSrc));
+ return;
}
- return false;
+ llvm_unreachable("Impossible reg-to-reg copy");
}
void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h?rev=108087&r1=108086&r2=108087&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h Sun Jul 11 02:56:13 2010
@@ -64,12 +64,10 @@
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
- virtual bool copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator I,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *DestRC,
- const TargetRegisterClass *SrcRC,
- DebugLoc DL) const;
+ virtual void copyPhysReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I, DebugLoc DL,
+ unsigned DestReg, unsigned SrcReg,
+ bool KillSrc) const;
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
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