[llvm-commits] [llvm] r107996 - in /llvm/trunk: lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrSSE.td lib/Target/X86/X86MCCodeEmitter.cpp lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86RegisterInfo.td test/MC/AsmParser/X86/x86_32-encoding.s test/MC/AsmParser/X86/x86_64-encoding.s utils/TableGen/EDEmitter.cpp

[David A. Greene]

Bruno Cardoso Lopes <bruno.cardoso at gmail.com> writes:

> Author: bruno
> Date: Fri Jul  9 13:27:43 2010
> New Revision: 107996
>
> URL: http://llvm.org/viewvc/llvm-project?rev=107996&view=rev
> Log:
> Start the support for AVX instructions with 256-bit %ymm registers. A couple of

Bruno,

This is good!  I already have a mostly complete AVX implementation done.
I have a number of changes to the fundamental x86 SIMD infrastructure I
would like to push through.  These changes greatly aid the
implementation of AVX by factoring out most of the common code
(essentially duplicated patterns for PS, PD, 128-bit and 256-bit
vectors and that sort of thing).  The idea is to specify patterns
ONCE and have TableGen auto-generate all of the variants.

We've had a resource constraint here which has prevented me from
pushing this through, but your changes have allowed me to push
management to make upstreaming our code a top priority.

Chris, what's the best way to move forward?  I've even got some block
posts ready to explain all of these changes.

                            -Dave