[llvm-commits] [llvm] r107673 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp test/CodeGen/ARM/vget_lane.ll

[Rafael Espindola]

Author: rafael
Date: Tue Jul  6 11:24:34 2010
New Revision: 107673

URL: http://llvm.org/viewvc/llvm-project?rev=107673&view=rev
Log:
Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion
if profitable.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/test/CodeGen/ARM/vget_lane.ll

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=107673&r1=107672&r2=107673&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Jul  6 11:24:34 2010
@@ -718,6 +718,12 @@
   if (SrcRC == ARM::DPR_8RegisterClass)
     SrcRC = ARM::DPR_VFP2RegisterClass;
 
+  // NEONMoveFixPass will convert VFP moves to NEON moves when profitable.
+  if (DestRC == ARM::DPR_VFP2RegisterClass)
+    DestRC = ARM::DPRRegisterClass;
+  if (SrcRC == ARM::DPR_VFP2RegisterClass)
+    SrcRC = ARM::DPRRegisterClass;
+
   // Allow QPR / QPR_VFP2 / QPR_8 cross-class copies.
   if (DestRC == ARM::QPR_VFP2RegisterClass ||
       DestRC == ARM::QPR_8RegisterClass)
@@ -750,10 +756,6 @@
       Opc = (SrcRC == ARM::GPRRegisterClass ? ARM::VMOVSR : ARM::VMOVS);
     else if (DestRC == ARM::DPRRegisterClass)
       Opc = ARM::VMOVD;
-    else if (DestRC == ARM::DPR_VFP2RegisterClass ||
-             SrcRC == ARM::DPR_VFP2RegisterClass)
-      // Always use neon reg-reg move if source or dest is NEON-only regclass.
-      Opc = ARM::VMOVDneon;
     else if (DestRC == ARM::QPRRegisterClass)
       Opc = ARM::VMOVQ;
     else if (DestRC == ARM::QQPRRegisterClass)

Modified: llvm/trunk/test/CodeGen/ARM/vget_lane.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vget_lane.ll?rev=107673&r1=107672&r2=107673&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vget_lane.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vget_lane.ll Tue Jul  6 11:24:34 2010
@@ -205,7 +205,7 @@
 define arm_aapcs_vfpcc <2 x float> @test_vset_lanef32(float %arg0_float32_t, <2 x float> %arg1_float32x2_t) nounwind {
 ;CHECK: test_vset_lanef32:
 ;CHECK: vmov.f32 s3, s0
-;CHECK: vmov d0, d1
+;CHECK: vmov.f64 d0, d1
 entry:
   %0 = insertelement <2 x float> %arg1_float32x2_t, float %arg0_float32_t, i32 1 ; <<2 x float>> [#uses=1]
   ret <2 x float> %0