[llvm-commits] [PATCH] Add DAGCombine for A-(-B) -> A+B
Eli Friedman
eli.friedman at gmail.com
Sat Jul 3 15:38:54 PDT 2010
Attached. I wanted to ask before committing because there might be
some non-obvious reason we don't already do this transformation...
This affects IR like the following:
define i32 @a(i32 %x, i32 %y) nounwind readnone {
entry:
%mul = mul i32 %y, -8
%sub = sub i32 %x, %mul
ret i32 %sub
}
-Eli
-------------- next part --------------
Index: DAGCombiner.cpp
===================================================================
--- DAGCombiner.cpp (revision 106979)
+++ DAGCombiner.cpp (working copy)
@@ -1540,6 +1540,13 @@
N0.getOperand(1).getOperand(1) == N1)
return DAG.getNode(ISD::SUB, N->getDebugLoc(), VT,
N0.getOperand(0), N0.getOperand(1).getOperand(0));
+ // fold A-(0-B) -> A+B
+ if (N1.getOpcode() == ISD::SUB)
+ if (ConstantSDNode *N01C =
+ dyn_cast<ConstantSDNode>(N1.getOperand(0).getNode()))
+ if (N01C->isNullValue())
+ return DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0,
+ N1.getOperand(1));
// If either operand of a sub is undef, the result is undef
if (N0.getOpcode() == ISD::UNDEF)
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