[llvm-commits] [llvm] r106916 - in /llvm/trunk/lib/Target/ARM: ARMBaseInstrInfo.h ARMInstrFormats.td Disassembler/ARMDisassemblerCore.cpp

[Bob Wilson]

Author: bwilson
Date: Fri Jun 25 18:45:37 2010
New Revision: 106916

URL: http://llvm.org/viewvc/llvm-project?rev=106916&view=rev
Log:
Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats.
Renumber MiscFrm to 25.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=106916&r1=106915&r2=106916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Fri Jun 25 18:45:37 2010
@@ -116,8 +116,10 @@
     // Thumb format
     ThumbFrm      = 24 << FormShift,
 
+    // Miscelleaneous format
+    MiscFrm       = 25 << FormShift,
+
     // NEON formats
-    NEONFrm       = 25 << FormShift,
     NEONGetLnFrm  = 26 << FormShift,
     NEONSetLnFrm  = 27 << FormShift,
     NEONDupFrm    = 28 << FormShift,

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=106916&r1=106915&r2=106916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Fri Jun 25 18:45:37 2010
@@ -50,15 +50,11 @@
 def VFPMiscFrm    : Format<23>;
 
 def ThumbFrm      : Format<24>;
+def MiscFrm       : Format<25>;
 
-def NEONFrm       : Format<25>;
 def NEONGetLnFrm  : Format<26>;
 def NEONSetLnFrm  : Format<27>;
 def NEONDupFrm    : Format<28>;
-
-def MiscFrm       : Format<29>;
-def ThumbMiscFrm  : Format<30>;
-
 def NLdStFrm       : Format<31>;
 def N1RegModImmFrm : Format<32>;
 def N2RegFrm       : Format<33>;

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=106916&r1=106915&r2=106916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Fri Jun 25 18:45:37 2010
@@ -2839,12 +2839,6 @@
   return true;
 }
 
-static bool DisassembleNEONFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
-  assert(0 && "Unreachable code!");
-  return false;
-}
-
 // Vector Get Lane (move scalar to ARM core register) Instructions.
 // VGETLNi32, VGETLNs16, VGETLNs8, VGETLNu16, VGETLNu8: Rt Dn index
 static bool DisassembleNEONGetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
@@ -3060,13 +3054,6 @@
   return false;
 }
 
-static bool DisassembleThumbMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
-
-  assert(0 && "Unexpected thumb misc. instruction!");
-  return false;
-}
-
 /// FuncPtrs - FuncPtrs maps ARMFormat to its corresponding DisassembleFP.
 /// We divide the disassembly task into different categories, with each one
 /// corresponding to a specific instruction encoding format.  There could be
@@ -3098,12 +3085,12 @@
   &DisassembleVFPLdStMulFrm,
   &DisassembleVFPMiscFrm,
   &DisassembleThumbFrm,
-  &DisassembleNEONFrm,
+  &DisassembleMiscFrm,
   &DisassembleNEONGetLnFrm,
   &DisassembleNEONSetLnFrm,
   &DisassembleNEONDupFrm,
-  &DisassembleMiscFrm,
-  &DisassembleThumbMiscFrm,
+  0,
+  0,
 
   // VLD and VST (including one lane) Instructions.
   &DisassembleNLdSt,