[llvm-commits] [llvm] r106614 - in /llvm/trunk: lib/CodeGen/MachineSink.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/MachineSink-CritEdge.ll
Daniel Dunbar
daniel at zuster.org
Tue Jun 22 17:48:25 PDT 2010
Author: ddunbar
Date: Tue Jun 22 19:48:25 2010
New Revision: 106614
URL: http://llvm.org/viewvc/llvm-project?rev=106614&view=rev
Log:
Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
Conflicts:
lib/CodeGen/MachineSink.cpp
Modified:
llvm/trunk/lib/CodeGen/MachineSink.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/MachineSink-CritEdge.ll
Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=106614&r1=106613&r2=106614&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineSink.cpp Tue Jun 22 19:48:25 2010
@@ -25,6 +25,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -61,6 +62,7 @@
bool ProcessBlock(MachineBasicBlock &MBB);
bool SinkInstruction(MachineInstr *MI, bool &SawStore);
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
+ bool LiveOutOfBasicBlock(const MachineInstr *MI, unsigned Reg) const;
};
} // end anonymous namespace
@@ -166,6 +168,44 @@
return MadeChange;
}
+/// LiveOutOfBasicBlock - Determine if the physical register, defined and dead
+/// in MI, is live on exit from the basic block.
+bool MachineSinking::LiveOutOfBasicBlock(const MachineInstr *MI,
+ unsigned Reg) const {
+ assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ "Only want to determine if a physical register is live out of a BB!");
+
+ const MachineBasicBlock *MBB = MI->getParent();
+ SmallSet<unsigned, 8> KilledRegs;
+ MachineBasicBlock::const_iterator I = MBB->end();
+ MachineBasicBlock::const_iterator E = MBB->begin();
+ assert(I != E && "How can there be an empty block at this point?!");
+
+ // Loop through the instructions bottom-up. If we see a kill of the preg
+ // first, then it's not live out of the BB. If we see a use or def first, then
+ // we assume that it is live out of the BB.
+ do {
+ const MachineInstr &CurMI = *--I;
+
+ for (unsigned i = 0, e = CurMI.getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = CurMI.getOperand(i);
+ if (!MO.isReg()) continue; // Ignore non-register operands.
+
+ unsigned MOReg = MO.getReg();
+ if (MOReg == 0) continue;
+
+ if (MOReg == Reg) {
+ if (MO.isKill())
+ return false;
+ if (MO.isUse() || MO.isDef())
+ return true;
+ }
+ }
+ } while (I != E);
+
+ return false;
+}
+
/// SinkInstruction - Determine whether it is safe to sink the specified machine
/// instruction out of its current block into a successor.
bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
@@ -188,6 +228,7 @@
// SuccToSinkTo - This is the successor to sink this instruction to, once we
// decide.
MachineBasicBlock *SuccToSinkTo = 0;
+ SmallVector<unsigned, 4> PhysRegs;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
@@ -216,9 +257,12 @@
if (AllocatableSet.test(AliasReg))
return false;
}
- } else if (!MO.isDead()) {
- // A def that isn't dead. We can't move it.
- return false;
+ } else {
+ if (!MO.isDead())
+ // A def that isn't dead. We can't move it.
+ return false;
+ else
+ PhysRegs.push_back(Reg);
}
} else {
// Virtual register uses are always safe to sink.
@@ -282,18 +326,13 @@
if (MI->getParent() == SuccToSinkTo)
return false;
- // If the instruction to move defines or uses a dead physical register which
- // is live when leaving the basic block, don't move it because it could turn
- // into a zombie define or misuse of that preg. E.g., EFLAGS.
- // (<rdar://problem/8030636>)
- for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
- const MachineOperand &MO = MI->getOperand(I);
- if (!MO.isReg()) continue;
- unsigned Reg = MO.getReg();
- if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
- if (SuccToSinkTo->isLiveIn(Reg))
+ // If the instruction to move defines a dead physical register which is live
+ // when leaving the basic block, don't move it because it could turn into a
+ // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
+ for (SmallVectorImpl<unsigned>::const_iterator
+ I = PhysRegs.begin(), E = PhysRegs.end(); I != E; ++I)
+ if (LiveOutOfBasicBlock(MI, *I))
return false;
- }
DEBUG(dbgs() << "Sink instr " << *MI << "\tinto block " << *SuccToSinkTo);
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=106614&r1=106613&r2=106614&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jun 22 19:48:25 2010
@@ -8466,42 +8466,22 @@
MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
unsigned Opc =
X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm());
-
BuildMI(BB, DL, TII->get(Opc)).addMBB(sinkMBB);
F->insert(It, copy0MBB);
F->insert(It, sinkMBB);
-
// Update machine-CFG edges by first adding all successors of the current
// block to the new block which will contain the Phi node for the select.
for (MachineBasicBlock::succ_iterator I = BB->succ_begin(),
E = BB->succ_end(); I != E; ++I)
sinkMBB->addSuccessor(*I);
-
// Next, remove all successors of the current block, and add the true
// and fallthrough blocks as its successors.
while (!BB->succ_empty())
BB->removeSuccessor(BB->succ_begin());
-
// Add the true and fallthrough blocks as its successors.
BB->addSuccessor(copy0MBB);
BB->addSuccessor(sinkMBB);
- // If the EFLAGS register isn't dead in the terminator, then claim that it's
- // live into the sink and copy blocks.
- const MachineFunction *MF = BB->getParent();
- const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
- BitVector ReservedRegs = TRI->getReservedRegs(*MF);
- const MachineInstr *Term = BB->getFirstTerminator();
-
- for (unsigned I = 0, E = Term->getNumOperands(); I != E; ++I) {
- const MachineOperand &MO = Term->getOperand(I);
- if (!MO.isReg() || MO.isKill() || MO.isDead()) continue;
- unsigned Reg = MO.getReg();
- if (Reg != X86::EFLAGS) continue;
- copy0MBB->addLiveIn(Reg);
- sinkMBB->addLiveIn(Reg);
- }
-
// copy0MBB:
// %FalseValue = ...
// # fallthrough to sinkMBB
Modified: llvm/trunk/test/CodeGen/X86/MachineSink-CritEdge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/MachineSink-CritEdge.ll?rev=106614&r1=106613&r2=106614&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/MachineSink-CritEdge.ll (original)
+++ llvm/trunk/test/CodeGen/X86/MachineSink-CritEdge.ll Tue Jun 22 19:48:25 2010
@@ -1,4 +1,10 @@
; RUN: llc < %s | FileCheck %s
+; XFAIL: *
+;
+; See <rdar://problem/8030636>. This test isn't valid after we made machine
+; sinking more conservative about sinking instructions that define a preg into a
+; block when we don't know if the preg is killed within the current block.
+
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
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