[llvm-commits] [llvm] r106470 - in /llvm/trunk: docs/TableGenFundamentals.html include/llvm/Target/Target.td utils/TableGen/CodeGenInstruction.cpp

Chris Lattner clattner at apple.com
Mon Jun 21 16:03:07 PDT 2010


On Jun 21, 2010, at 1:35 PM, Eric Christopher wrote:

> Author: echristo
> Date: Mon Jun 21 15:35:09 2010
> New Revision: 106470
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=106470&view=rev
> Log:
> Remove isTwoAddress from llvm.

Woot! Thanks Eric,

-Chris

> 
> Modified:
>    llvm/trunk/docs/TableGenFundamentals.html
>    llvm/trunk/include/llvm/Target/Target.td
>    llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
> 
> Modified: llvm/trunk/docs/TableGenFundamentals.html
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGenFundamentals.html?rev=106470&r1=106469&r2=106470&view=diff
> ==============================================================================
> --- llvm/trunk/docs/TableGenFundamentals.html (original)
> +++ llvm/trunk/docs/TableGenFundamentals.html Mon Jun 21 15:35:09 2010
> @@ -144,7 +144,6 @@
>   <b>bit</b> mayLoad = 0;
>   <b>bit</b> mayStore = 0;
>   <b>bit</b> isImplicitDef = 0;
> -  <b>bit</b> isTwoAddress = 1;
>   <b>bit</b> isConvertibleToThreeAddress = 1;
>   <b>bit</b> isCommutable = 1;
>   <b>bit</b> isTerminator = 0;
> 
> Modified: llvm/trunk/include/llvm/Target/Target.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=106470&r1=106469&r2=106470&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/Target.td (original)
> +++ llvm/trunk/include/llvm/Target/Target.td Mon Jun 21 15:35:09 2010
> @@ -203,7 +203,6 @@
>   bit canFoldAsLoad = 0;    // Can this be folded as a simple memory operand?
>   bit mayLoad      = 0;     // Is it possible for this inst to read memory?
>   bit mayStore     = 0;     // Is it possible for this inst to write memory?
> -  bit isTwoAddress = 0;     // Is this a two address instruction?
>   bit isConvertibleToThreeAddress = 0;  // Can this 2-addr instruction promote?
>   bit isCommutable = 0;     // Is this 3 operand instruction commutable?
>   bit isTerminator = 0;     // Is this part of the terminator for a basic block?
> 
> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=106470&r1=106469&r2=106470&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Mon Jun 21 15:35:09 2010
> @@ -107,7 +107,6 @@
>   canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");
>   mayLoad      = R->getValueAsBit("mayLoad");
>   mayStore     = R->getValueAsBit("mayStore");
> -  bool isTwoAddress = R->getValueAsBit("isTwoAddress");
>   isPredicable = R->getValueAsBit("isPredicable");
>   isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
>   isCommutable = R->getValueAsBit("isCommutable");
> @@ -212,16 +211,6 @@
>   // Parse Constraints.
>   ParseConstraints(R->getValueAsString("Constraints"), this);
> 
> -  // For backward compatibility: isTwoAddress means operand 1 is tied to
> -  // operand 0.
> -  if (isTwoAddress) {
> -    if (!OperandList[1].Constraints[0].isNone())
> -      throw R->getName() + ": cannot use isTwoAddress property: instruction "
> -            "already has constraint set!";
> -    OperandList[1].Constraints[0] =
> -      CodeGenInstruction::ConstraintInfo::getTied(0);
> -  }
> -
>   // Parse the DisableEncoding field.
>   std::string DisableEncoding = R->getValueAsString("DisableEncoding");
>   while (1) {
> 
> 
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