[llvm-commits] [llvm] r106289 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/crash-O0.ll

[Jakob Stoklund Olesen]

Author: stoklund
Date: Fri Jun 18 11:49:33 2010
New Revision: 106289

URL: http://llvm.org/viewvc/llvm-project?rev=106289&view=rev
Log:
Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast
may try to spill them, and we can't do that.

Added:
    llvm/trunk/test/CodeGen/ARM/crash-O0.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=106289&r1=106288&r2=106289&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Jun 18 11:49:33 2010
@@ -4945,7 +4945,7 @@
     }
   }
   if (StringRef("{cc}").equals_lower(Constraint))
-    return std::make_pair(0U, ARM::CCRRegisterClass);
+    return std::make_pair(unsigned(ARM::CPSR), ARM::CCRRegisterClass);
 
   return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
 }

Added: llvm/trunk/test/CodeGen/ARM/crash-O0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/crash-O0.ll?rev=106289&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/crash-O0.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/crash-O0.ll Fri Jun 18 11:49:33 2010
@@ -0,0 +1,12 @@
+; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
+target triple = "armv6-apple-darwin10"
+
+%struct0 = type { i32, i32 }
+
+; This function would crash RegAllocFast because it tried to spill %CPSR.
+define arm_apcscc void @clobber_cc() nounwind noinline ssp {
+entry:
+  %asmtmp = call %struct0 asm sideeffect "...", "=&r,=&r,r,Ir,r,~{cc},~{memory}"(i32* undef, i32 undef, i32 1) nounwind ; <%0> [#uses=0]
+  unreachable
+}