[llvm-commits] [llvm] r106004 - /llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
Bob Wilson
bob.wilson at apple.com
Tue Jun 15 10:27:54 PDT 2010
Author: bwilson
Date: Tue Jun 15 12:27:54 2010
New Revision: 106004
URL: http://llvm.org/viewvc/llvm-project?rev=106004&view=rev
Log:
Add some missing checks for the case where the extract_subregs are
combined to an insert_subreg, i.e., where the destination register is larger
than the source. We need to check that the subregs can be composed for that
case in a symmetrical way to the case when the destination is smaller.
Modified:
llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=106004&r1=106003&r2=106004&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
+++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Tue Jun 15 12:27:54 2010
@@ -1179,7 +1179,7 @@
// If there are no other uses than extract_subreg which feed into
// the reg_sequence, then we might be able to coalesce them.
bool CanCoalesce = true;
- SmallVector<unsigned, 4> SubIndices;
+ SmallVector<unsigned, 4> SrcSubIndices, DstSubIndices;
for (MachineRegisterInfo::use_nodbg_iterator
UI = MRI->use_nodbg_begin(SrcReg),
UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
@@ -1190,24 +1190,35 @@
CanCoalesce = false;
break;
}
- SubIndices.push_back(UseMI->getOperand(2).getImm());
+ SrcSubIndices.push_back(UseMI->getOperand(2).getImm());
+ DstSubIndices.push_back(UseMI->getOperand(0).getSubReg());
}
- if (!CanCoalesce || SubIndices.size() < 2)
+ if (!CanCoalesce || SrcSubIndices.size() < 2)
continue;
- std::sort(SubIndices.begin(), SubIndices.end());
+ // Check that the source subregisters can be combined.
+ std::sort(SrcSubIndices.begin(), SrcSubIndices.end());
unsigned NewSrcSubIdx = 0;
- if (!TRI->canCombineSubRegIndices(MRI->getRegClass(SrcReg), SubIndices,
+ if (!TRI->canCombineSubRegIndices(MRI->getRegClass(SrcReg), SrcSubIndices,
NewSrcSubIdx))
continue;
+ // Check that the destination subregisters can also be combined.
+ std::sort(DstSubIndices.begin(), DstSubIndices.end());
+ unsigned NewDstSubIdx = 0;
+ if (!TRI->canCombineSubRegIndices(MRI->getRegClass(DstReg), DstSubIndices,
+ NewDstSubIdx))
+ continue;
+
+ // If neither source nor destination can be combined to the full register,
+ // just give up. This could be improved if it ever matters.
+ if (NewSrcSubIdx != 0 && NewDstSubIdx != 0)
+ continue;
+
// Now that we know that all the uses are extract_subregs and that those
// subregs can somehow be combined, scan all the extract_subregs again to
// make sure the subregs are in the right order and can be composed.
- // Also keep track of the destination subregisters so we can make sure
- // that those can be combined.
- SubIndices.clear();
MachineInstr *SomeMI = 0;
CanCoalesce = true;
for (MachineRegisterInfo::use_nodbg_iterator
@@ -1218,29 +1229,19 @@
unsigned DstSubIdx = UseMI->getOperand(0).getSubReg();
unsigned SrcSubIdx = UseMI->getOperand(2).getImm();
assert(DstSubIdx != 0 && "missing subreg from RegSequence elimination");
- if (TRI->composeSubRegIndices(NewSrcSubIdx, DstSubIdx) != SrcSubIdx) {
+ if ((NewDstSubIdx == 0 &&
+ TRI->composeSubRegIndices(NewSrcSubIdx, DstSubIdx) != SrcSubIdx) ||
+ (NewSrcSubIdx == 0 &&
+ TRI->composeSubRegIndices(NewDstSubIdx, SrcSubIdx) != DstSubIdx)) {
CanCoalesce = false;
break;
}
- SubIndices.push_back(DstSubIdx);
// Keep track of one of the uses.
SomeMI = UseMI;
}
if (!CanCoalesce)
continue;
- // Check that the destination subregisters can also be combined.
- std::sort(SubIndices.begin(), SubIndices.end());
- unsigned NewDstSubIdx = 0;
- if (!TRI->canCombineSubRegIndices(MRI->getRegClass(DstReg), SubIndices,
- NewDstSubIdx))
- continue;
-
- // If neither source nor destination can be combined to the full register,
- // just give up. This could be improved if it ever matters.
- if (NewSrcSubIdx != 0 && NewDstSubIdx != 0)
- continue;
-
// Insert a copy or an extract to replace the original extracts.
MachineBasicBlock::iterator InsertLoc = SomeMI;
if (NewSrcSubIdx) {
More information about the llvm-commits
mailing list