[llvm-commits] [llvm] r105876 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td

[Bruno Cardoso Lopes]

Author: bruno
Date: Fri Jun 11 22:12:14 2010
New Revision: 105876

URL: http://llvm.org/viewvc/llvm-project?rev=105876&view=rev
Log:
make the avx intrinsics 3 address

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=105876&r1=105875&r2=105876&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Fri Jun 11 22:12:14 2010
@@ -790,16 +790,20 @@
        !strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"),
        [(set VR128:$dst, (!nameconcat<Intrinsic>("int_x86_sse_",
                           !strconcat(OpcodeStr, "_ss")) VR128:$src1,
-                                                      VR128:$src2))]>;
+                                                      VR128:$src2))]> {
                           // int_x86_sse_xxx_ss
+    let Constraints = "";
+  }
 
   def V#NAME#SDrr_Int : VSDI<opc, MRMSrcReg, (outs VR128:$dst),
                                              (ins VR128:$src1, VR128:$src2),
        !strconcat(OpcodeStr, "sd\t{$src2, $dst|$dst, $src2}"),
        [(set VR128:$dst, (!nameconcat<Intrinsic>("int_x86_sse2_",
                           !strconcat(OpcodeStr, "_sd")) VR128:$src1,
-                                                      VR128:$src2))]>;
+                                                      VR128:$src2))]> {
                           // int_x86_sse2_xxx_sd
+    let Constraints = "";
+  }
 
   def SSrr_Int : SSI<opc, MRMSrcReg, (outs VR128:$dst),
                                      (ins VR128:$src1, VR128:$src2),
@@ -823,16 +827,20 @@
        !strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"),
        [(set VR128:$dst, (!nameconcat<Intrinsic>("int_x86_sse_",
                           !strconcat(OpcodeStr, "_ss")) VR128:$src1,
-                                               sse_load_f32:$src2))]>;
+                                               sse_load_f32:$src2))]> {
                           // int_x86_sse_xxx_ss
+    let Constraints = "";
+  }
 
   def V#NAME#SDrm_Int : VSDI<opc, MRMSrcMem, (outs VR128:$dst),
                                              (ins VR128:$src1, sdmem:$src2),
        !strconcat(OpcodeStr, "sd\t{$src2, $dst|$dst, $src2}"),
        [(set VR128:$dst, (!nameconcat<Intrinsic>("int_x86_sse2_",
                           !strconcat(OpcodeStr, "_sd")) VR128:$src1,
-                                               sse_load_f64:$src2))]>;
+                                               sse_load_f64:$src2))]> {
                           // int_x86_sse2_xxx_sd
+    let Constraints = "";
+  }
 
   def SSrm_Int : SSI<opc, MRMSrcMem, (outs VR128:$dst),
                                      (ins VR128:$src1, ssmem:$src2),