[llvm-commits] [llvm] r105294 - in /llvm/trunk/lib/CodeGen: MachineInstr.cpp SimpleRegisterCoalescing.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Tue Jun  1 17:39:25 2010
New Revision: 105294

URL: http://llvm.org/viewvc/llvm-project?rev=105294&view=rev
Log:
Properly compose subregister indices when coalescing.
The comment about ordering of subreg indices is no longer true.
This exposed a bug in the new substVirtReg method that is also fixed.

Modified:
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=105294&r1=105293&r2=105294&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Jun  1 17:39:25 2010
@@ -117,7 +117,8 @@
   if (SubIdx && getSubReg())
     SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());
   setReg(Reg);
-  setSubReg(SubIdx);
+  if (SubIdx)
+    setSubReg(SubIdx);
 }
 
 void MachineOperand::substPhysReg(unsigned Reg, const TargetRegisterInfo &TRI) {

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=105294&r1=105293&r2=105294&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Jun  1 17:39:25 2010
@@ -848,19 +848,7 @@
       continue;
     }
 
-    // Sub-register indexes goes from small to large. e.g.
-    // RAX: 1 -> AL, 2 -> AX, 3 -> EAX
-    // EAX: 1 -> AL, 2 -> AX
-    // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose
-    // sub-register 2 is also AX.
-    //
-    // FIXME: Properly compose subreg indices for all targets.
-    //
-    if (SubIdx && OldSubIdx && SubIdx != OldSubIdx)
-      ;
-    else if (SubIdx)
-      O.setSubReg(SubIdx);
-    O.setReg(DstReg);
+    O.substVirtReg(DstReg, SubIdx, *tri_);
 
     DEBUG({
         dbgs() << "\t\tupdated: ";