[llvm-commits] [llvm] r105092 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/sibcall-3.ll

[Evan Cheng]

Author: evancheng
Date: Fri May 28 20:35:22 2010
New Revision: 105092

URL: http://llvm.org/viewvc/llvm-project?rev=105092&view=rev
Log:
Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments.

Added:
    llvm/trunk/test/CodeGen/X86/sibcall-3.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=105092&r1=105091&r2=105092&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri May 28 20:35:22 2010
@@ -2427,6 +2427,24 @@
         }
       }
     }
+
+    // If the tailcall address may be in a register, then make sure it's
+    // possible to register allocate for it. In 32-bit, the call address can
+    // only target EAX, EDX, or ECX since the tail call must be scheduled after
+    // callee-saved registers are restored. In 64-bit, it's RAX, RCX, RDX, RSI,
+    // RDI, R8, R9, R11.
+    if (!isa<GlobalAddressSDNode>(Callee) &&
+        !isa<ExternalSymbolSDNode>(Callee)) {
+      unsigned Limit = Subtarget->is64Bit() ? 8 : 3;
+      unsigned NumInRegs = 0;
+      for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
+        CCValAssign &VA = ArgLocs[i];
+        if (VA.isRegLoc()) {
+          if (++NumInRegs == Limit)
+            return false;
+        }
+      }
+    }
   }
 
   return true;

Added: llvm/trunk/test/CodeGen/X86/sibcall-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sibcall-3.ll?rev=105092&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sibcall-3.ll (added)
+++ llvm/trunk/test/CodeGen/X86/sibcall-3.ll Fri May 28 20:35:22 2010
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s
+; PR7193
+
+define void @t1(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind {
+; CHECK: t1:
+; CHECK: call 0
+  tail call void null(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind
+  ret void
+}
+
+define void @t2(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind {
+; CHECK: t2:
+; CHECK: jmpl
+  tail call void null(i8* inreg %dst, i8* inreg %src) nounwind
+  ret void
+}