[llvm-commits] [llvm] r104704 - in /llvm/trunk: include/llvm/Target/Target.td lib/Target/ARM/ARMRegisterInfo.td lib/Target/Blackfin/BlackfinRegisterInfo.td lib/Target/MBlaze/MBlazeRegisterInfo.td lib/Target/MSP430/MSP430RegisterInfo.td lib/Target

[Anton Korobeynikov]

Hello, Jakob

> CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
> index that returns the same register, and ARM NEON Q registers where both D
> subregs have ssub_0 and ssub_1 sub-subregs.
Strictly speaking, this is not true. It's not possible to access S
subregs in NEON mode (thus D subregs of Q registers do not have any
subregs).
VFP-addressable D registers should have S subregs though, but there
are no Q superregisters for such D registers.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University