[llvm-commits] [llvm] r104116 - /llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
Daniel Dunbar
daniel at zuster.org
Wed May 19 01:07:12 PDT 2010
Author: ddunbar
Date: Wed May 19 03:07:12 2010
New Revision: 104116
URL: http://llvm.org/viewvc/llvm-project?rev=104116&view=rev
Log:
MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
CALL64pcrel32, for the same reason.
Modified:
llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp?rev=104116&r1=104115&r2=104116&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp Wed May 19 03:07:12 2010
@@ -364,9 +364,11 @@
LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
break;
- // CALL64r, CALL64pcrel32 - These instructions have register inputs modeled as
- // normal uses instead of implicit uses. As such, truncate off all but the
- // first operand (the callee). FIXME: Change isel.
+ // TAILJMPr, TAILJMPr64, CALL64r, CALL64pcrel32 - These instructions have
+ // register inputs modeled as normal uses instead of implicit uses. As such,
+ // truncate off all but the first operand (the callee). FIXME: Change isel.
+ case X86::TAILJMPr:
+ case X86::TAILJMPr64:
case X86::CALL64r:
case X86::CALL64pcrel32: {
unsigned Opcode = OutMI.getOpcode();
More information about the llvm-commits
mailing list