[llvm-commits] [llvm] r104062 - /llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp

[Chris Lattner]

Author: lattner
Date: Tue May 18 16:40:18 2010
New Revision: 104062

URL: http://llvm.org/viewvc/llvm-project?rev=104062&view=rev
Log:
make mcinstlower remove all but the first operand to CALL64pcrel32.
The register use operands (e.g. the first argument is passed in a 
register) is currently being modeled as a normal register use,
instead of correctly being an implicit use.  This causes the operand
to get propagated onto the mcinst, which was causing the encoder to
emit a rex prefix byte, which generates an invalid call.

This fixes rdar://7998435

Modified:
    llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp

Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp?rev=104062&r1=104061&r2=104062&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp Tue May 18 16:40:18 2010
@@ -329,7 +329,17 @@
     LowerSubReg32_Op0(OutMI, X86::MOV32r0);   // MOV64r0 -> MOV32r0
     LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
     break;
-      
+    
+  // CALL64pcrel32 - This instruction has register inputs modeled as normal
+  // uses instead of implicit uses.  As such, truncate off all but the first
+  // operand (the callee).  FIXME: Change isel.
+  case X86::CALL64pcrel32: {
+    MCOperand Saved = OutMI.getOperand(0);
+    OutMI = MCInst();
+    OutMI.setOpcode(X86::CALL64pcrel32);
+    OutMI.addOperand(Saved);
+    break;
+  }
       
   // The assembler backend wants to see branches in their small form and relax
   // them to their large form.  The JIT can only handle the large form because