[llvm-commits] [llvm] r103419 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
Evan Cheng
evan.cheng at apple.com
Mon May 10 12:03:57 PDT 2010
Author: evancheng
Date: Mon May 10 14:03:57 2010
New Revision: 103419
URL: http://llvm.org/viewvc/llvm-project?rev=103419&view=rev
Log:
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
Added:
llvm/trunk/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=103419&r1=103418&r2=103419&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon May 10 14:03:57 2010
@@ -760,12 +760,18 @@
bool Replace1 = false;
SDValue N1 = Op.getOperand(1);
- SDValue NN1 = PromoteOperand(N1, PVT, Replace1);
- if (NN1.getNode() == 0)
- return SDValue();
+ SDValue NN1;
+ if (N0 == N1)
+ NN1 = NN0;
+ else {
+ NN1 = PromoteOperand(N1, PVT, Replace1);
+ if (NN1.getNode() == 0)
+ return SDValue();
+ }
AddToWorkList(NN0.getNode());
- AddToWorkList(NN1.getNode());
+ if (NN1.getNode())
+ AddToWorkList(NN1.getNode());
if (Replace0)
ReplaceLoadWithPromotedLoad(N0.getNode(), NN0.getNode());
Added: llvm/trunk/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll?rev=103419&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll Mon May 10 14:03:57 2010
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10
+; PR7018
+; rdar://7939869
+
+define i32 @CXB30130(i32 %num1, i16* nocapture %num2, float* nocapture %num3, double* nocapture %num4) nounwind ssp {
+entry:
+ %0 = load i16* %num2, align 2 ; <i16> [#uses=2]
+ %1 = mul nsw i16 %0, %0 ; <i16> [#uses=1]
+ store i16 %1, i16* %num2, align 2
+ ret i32 undef
+}
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