[llvm-commits] [llvm] r103120 - in /llvm/trunk/test/CodeGen: ARM/div.ll Thumb2/div.ll

[Jim Grosbach]

Author: grosbach
Date: Wed May  5 15:47:15 2010
New Revision: 103120

URL: http://llvm.org/viewvc/llvm-project?rev=103120&view=rev
Log:
Add tests for ARMV7M divide instruction use

Added:
    llvm/trunk/test/CodeGen/Thumb2/div.ll
Modified:
    llvm/trunk/test/CodeGen/ARM/div.ll

Modified: llvm/trunk/test/CodeGen/ARM/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/div.ll?rev=103120&r1=103119&r2=103120&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/div.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/div.ll Wed May  5 15:47:15 2010
@@ -1,33 +1,43 @@
-; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECK-ARM
+; RUN: llc < %s -march=arm -mcpu=cortex-m3 \
+; RUN:    | FileCheck %s -check-prefix=CHECK-ARMV7M
 
 define i32 @f1(i32 %a, i32 %b) {
 entry:
-; CHECK: f1
-; CHECK: __divsi3
+; CHECK-ARM: f1
+; CHECK-ARM: __divsi3
+; CHECK-ARMV7M: f1
+; CHECK-ARMV7M: sdiv
         %tmp1 = sdiv i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }
 
 define i32 @f2(i32 %a, i32 %b) {
 entry:
-; CHECK: f2
-; CHECK: __udivsi3
+; CHECK-ARM: f2
+; CHECK-ARM: __udivsi3
+; CHECK-ARMV7M: _f2
+; CHECK-ARMV7M: udiv
         %tmp1 = udiv i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }
 
 define i32 @f3(i32 %a, i32 %b) {
 entry:
-; CHECK: f3
-; CHECK: __modsi3
+; CHECK-ARM: f3
+; CHECK-ARM: __modsi3
+; CHECK-ARMV7M: _f3
+; CHECK-ARMV7M: sdiv
         %tmp1 = srem i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }
 
 define i32 @f4(i32 %a, i32 %b) {
 entry:
-; CHECK: f4
-; CHECK: __umodsi3
+; CHECK-ARM: f4
+; CHECK-ARM: __umodsi3
+; CHECK-ARMV7M: _f4
+; CHECK-ARMV7M: udiv
         %tmp1 = urem i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }

Added: llvm/trunk/test/CodeGen/Thumb2/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/div.ll?rev=103120&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/div.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/div.ll Wed May  5 15:47:15 2010
@@ -0,0 +1,45 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 \
+; RUN:    | FileCheck %s -check-prefix=CHECK-THUMB
+; RUN: llc < %s -march=arm -mcpu=cortex-m3 -mattr=+thumb2 \
+; RUN:    | FileCheck %s -check-prefix=CHECK-THUMBV7M
+
+define i32 @f1(i32 %a, i32 %b) {
+entry:
+; CHECK-THUMB: f1
+; CHECK-THUMB: __divsi3
+; CHECK-THUMBV7M: f1
+; CHECK-THUMBV7M: sdiv
+        %tmp1 = sdiv i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+entry:
+; CHECK-THUMB: f2
+; CHECK-THUMB: __udivsi3
+; CHECK-THUMBV7M: _f2
+; CHECK-THUMBV7M: udiv
+        %tmp1 = udiv i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+entry:
+; CHECK-THUMB: f3
+; CHECK-THUMB: __modsi3
+; CHECK-THUMBV7M: _f3
+; CHECK-THUMBV7M: sdiv
+        %tmp1 = srem i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+entry:
+; CHECK-THUMB: f4
+; CHECK-THUMB: __umodsi3
+; CHECK-THUMBV7M: _f4
+; CHECK-THUMBV7M: udiv
+        %tmp1 = urem i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+