[llvm-commits] [llvm] r103021 - in /llvm/trunk: lib/Target/CellSPU/SPUISelDAGToDAG.cpp test/CodeGen/CellSPU/storestruct.ll
Chris Lattner
sabre at nondot.org
Tue May 4 10:58:47 PDT 2010
Author: lattner
Date: Tue May 4 12:58:46 2010
New Revision: 103021
URL: http://llvm.org/viewvc/llvm-project?rev=103021&view=rev
Log:
"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
Patch by Kalle Raiskila!
Added:
llvm/trunk/test/CodeGen/CellSPU/storestruct.ll
Modified:
llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=103021&r1=103020&r2=103021&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Tue May 4 12:58:46 2010
@@ -941,13 +941,21 @@
&& ((RN = dyn_cast<RegisterSDNode>(Op0.getNode())) != 0
&& RN->getReg() != SPU::R1))) {
NewOpc = SPU::Ar32;
+ Ops[1] = Op1;
if (Op1.getOpcode() == ISD::Constant) {
ConstantSDNode *CN = cast<ConstantSDNode>(Op1);
Op1 = CurDAG->getTargetConstant(CN->getSExtValue(), VT);
- NewOpc = (isI32IntS10Immediate(CN) ? SPU::AIr32 : SPU::Ar32);
+ if (isInt<10>(CN->getSExtValue())) {
+ NewOpc = SPU::AIr32;
+ Ops[1] = Op1;
+ } else {
+ Ops[1] = SDValue(CurDAG->getMachineNode(SPU::ILr32, dl,
+ N->getValueType(0),
+ Op1),
+ 0);
+ }
}
Ops[0] = Op0;
- Ops[1] = Op1;
n_ops = 2;
}
}
Added: llvm/trunk/test/CodeGen/CellSPU/storestruct.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/storestruct.ll?rev=103021&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/storestruct.ll (added)
+++ llvm/trunk/test/CodeGen/CellSPU/storestruct.ll Tue May 4 12:58:46 2010
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=cellspu | FileCheck %s
+
+%0 = type {i32, i32}
+ at buffer = global [ 72 x %0 ] zeroinitializer
+
+define void at test( ) {
+; Check that there is no illegal "a rt, ra, imm" instruction
+; CHECK-NOT: a {{\$., \$., 5..}}
+; CHECK: a {{\$., \$., \$.}}
+ store %0 {i32 1, i32 2} ,
+ %0* getelementptr ([72 x %0]* @buffer, i32 0, i32 71)
+ ret void
+}
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