[llvm-commits] [llvm] r102657 - in /llvm/trunk/lib: CodeGen/PrologEpilogInserter.cpp Target/PowerPC/PPCRegisterInfo.cpp

[Dale Johannesen]

On Apr 29, 2010, at 1:33 PMPDT, Evan Cheng wrote:

> Thanks. Does naked functions work on other targets?

Don't know.  Some, probably.  The gcc 4.2 doc, which is the latest I'm allowed to read, says Naked works on ARM and a few others, but not x86 or ppc; that may well have changed by now.  It's the sort of thing that gets implemented when somebody needs it.

The original problem (with asm functions) might well exist on x86 and/or ARM, but I think we can be pretty sure it would have been reported by now if it affected anything anybody cares about.  It's certainly not something we want people to use in new code.

> Evan
> 
> On Apr 29, 2010, at 12:32 PM, Dale Johannesen wrote:
> 
>> Author: johannes
>> Date: Thu Apr 29 14:32:19 2010
>> New Revision: 102657
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=102657&view=rev
>> Log:
>> Make naked functions work on PPC.
>> 
>> 
>> Modified:
>>   llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
>>   llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
>> 
>> Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=102657&r1=102656&r2=102657&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Apr 29 14:32:19 2010
>> @@ -197,6 +197,10 @@
>>  if (CSRegs == 0 || CSRegs[0] == 0)
>>    return;
>> 
>> +  // In Naked functions we aren't going to save any registers.
>> +  if (Fn.getFunction()->hasFnAttr(Attribute::Naked))
>> +    return;
>> +
>>  // Figure out which *callee saved* registers are modified by the current
>>  // function, thus needing to be saved and restored in the prolog/epilog.
>>  const TargetRegisterClass * const *CSRegClasses =
>> 
>> Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=102657&r1=102656&r2=102657&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Apr 29 14:32:19 2010
>> @@ -409,6 +409,9 @@
>> //
>> static bool needsFP(const MachineFunction &MF) {
>>  const MachineFrameInfo *MFI = MF.getFrameInfo();
>> +  // Naked functions have no stack frame pushed, so we don't have a frame pointer.
>> +  if (MF.getFunction()->hasFnAttr(Attribute::Naked))
>> +    return false;
>>  return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects() ||
>>    (GuaranteedTailCallOpt && MF.getInfo<PPCFunctionInfo>()->hasFastCall());
>> }
>> @@ -794,7 +797,10 @@
>>  // If we're not using a Frame Pointer that has been set to the value of the
>>  // SP before having the stack size subtracted from it, then add the stack size
>>  // to Offset to get the correct offset.
>> -  Offset += MFI->getStackSize();
>> +  // Naked functions have stack size 0, although getStackSize may not reflect that
>> +  // because we didn't call all the pieces that compute it for naked functions.
>> +  if (!MF.getFunction()->hasFnAttr(Attribute::Naked))
>> +    Offset += MFI->getStackSize();
>> 
>>  // If we can, encode the offset directly into the instruction.  If this is a
>>  // normal PPC "ri" instruction, any 16-bit value can be safely encoded.  If
>> 
>> 
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