[llvm-commits] [llvm] r102487 - in /llvm/trunk/test/CodeGen/X86: rot16.ll rot32.ll shl_elim.ll

Evan Cheng evan.cheng at apple.com
Tue Apr 27 18:53:14 PDT 2010


Author: evancheng
Date: Tue Apr 27 20:53:13 2010
New Revision: 102487

URL: http://llvm.org/viewvc/llvm-project?rev=102487&view=rev
Log:
Update tests.

Modified:
    llvm/trunk/test/CodeGen/X86/rot16.ll
    llvm/trunk/test/CodeGen/X86/rot32.ll
    llvm/trunk/test/CodeGen/X86/shl_elim.ll

Modified: llvm/trunk/test/CodeGen/X86/rot16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot16.ll?rev=102487&r1=102486&r2=102487&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot16.ll Tue Apr 27 20:53:13 2010
@@ -1,11 +1,9 @@
-; RUN: llc < %s -march=x86 > %t
-; RUN: grep rol %t | count 3
-; RUN: grep ror %t | count 1
-; RUN: grep shld %t | count 2
-; RUN: grep shrd %t | count 2
+; RUN: llc < %s -march=x86 | FileCheck %s
 
 define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: foo:
+; CHECK: rolw %cl
 	%0 = shl i16 %x, %z
 	%1 = sub i16 16, %z
 	%2 = lshr i16 %x, %1
@@ -15,6 +13,8 @@
 
 define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: bar:
+; CHECK: shldw %cl
 	%0 = shl i16 %y, %z
 	%1 = sub i16 16, %z
 	%2 = lshr i16 %x, %1
@@ -24,6 +24,8 @@
 
 define i16 @un(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: un:
+; CHECK: rorw %cl
 	%0 = lshr i16 %x, %z
 	%1 = sub i16 16, %z
 	%2 = shl i16 %x, %1
@@ -33,6 +35,8 @@
 
 define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: bu:
+; CHECK: shrdw
 	%0 = lshr i16 %y, %z
 	%1 = sub i16 16, %z
 	%2 = shl i16 %x, %1
@@ -42,6 +46,8 @@
 
 define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: xfoo:
+; CHECK: rolw $5
 	%0 = lshr i16 %x, 11
 	%1 = shl i16 %x, 5
 	%2 = or i16 %0, %1
@@ -50,6 +56,8 @@
 
 define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: xbar:
+; CHECK: shldw $5
 	%0 = shl i16 %y, 5
 	%1 = lshr i16 %x, 11
 	%2 = or i16 %0, %1
@@ -58,6 +66,8 @@
 
 define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: xun:
+; CHECK: rolw $11
 	%0 = lshr i16 %x, 5
 	%1 = shl i16 %x, 11
 	%2 = or i16 %0, %1
@@ -66,6 +76,8 @@
 
 define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK: xbu:
+; CHECK: shldw $11
 	%0 = lshr i16 %y, 5
 	%1 = shl i16 %x, 11
 	%2 = or i16 %0, %1

Modified: llvm/trunk/test/CodeGen/X86/rot32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot32.ll?rev=102487&r1=102486&r2=102487&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot32.ll Tue Apr 27 20:53:13 2010
@@ -1,11 +1,9 @@
-; RUN: llc < %s -march=x86 > %t
-; RUN: grep rol %t | count 3
-; RUN: grep ror %t | count 1
-; RUN: grep shld %t | count 2
-; RUN: grep shrd %t | count 2
+; RUN: llc < %s -march=x86 | FileCheck %s
 
 define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: foo:
+; CHECK: roll %cl
 	%0 = shl i32 %x, %z
 	%1 = sub i32 32, %z
 	%2 = lshr i32 %x, %1
@@ -15,6 +13,8 @@
 
 define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: bar:
+; CHECK: shldl %cl
 	%0 = shl i32 %y, %z
 	%1 = sub i32 32, %z
 	%2 = lshr i32 %x, %1
@@ -24,6 +24,8 @@
 
 define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: un:
+; CHECK: rorl %cl
 	%0 = lshr i32 %x, %z
 	%1 = sub i32 32, %z
 	%2 = shl i32 %x, %1
@@ -33,6 +35,8 @@
 
 define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: bu:
+; CHECK: shrdl %cl
 	%0 = lshr i32 %y, %z
 	%1 = sub i32 32, %z
 	%2 = shl i32 %x, %1
@@ -42,6 +46,8 @@
 
 define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: xfoo:
+; CHECK: roll $7
 	%0 = lshr i32 %x, 25
 	%1 = shl i32 %x, 7
 	%2 = or i32 %0, %1
@@ -50,6 +56,8 @@
 
 define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: xbar:
+; CHECK: shldl $7
 	%0 = shl i32 %y, 7
 	%1 = lshr i32 %x, 25
 	%2 = or i32 %0, %1
@@ -58,6 +66,8 @@
 
 define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: xun:
+; CHECK: roll $25
 	%0 = lshr i32 %x, 7
 	%1 = shl i32 %x, 25
 	%2 = or i32 %0, %1
@@ -66,6 +76,8 @@
 
 define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
 entry:
+; CHECK: xbu:
+; CHECK: shldl
 	%0 = lshr i32 %y, 7
 	%1 = shl i32 %x, 25
 	%2 = or i32 %0, %1

Modified: llvm/trunk/test/CodeGen/X86/shl_elim.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl_elim.ll?rev=102487&r1=102486&r2=102487&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shl_elim.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shl_elim.ll Tue Apr 27 20:53:13 2010
@@ -2,7 +2,7 @@
 ; RUN: llc < %s -march=x86 | grep {shrl	.eax}
 ; RUN: llc < %s -march=x86 | grep {movswl	.ax, .eax}
 
-define i32 @test1(i64 %a) {
+define i32 @test1(i64 %a) nounwind {
         %tmp29 = lshr i64 %a, 24                ; <i64> [#uses=1]
         %tmp23 = trunc i64 %tmp29 to i32                ; <i32> [#uses=1]
         %tmp410 = lshr i32 %tmp23, 9            ; <i32> [#uses=1]





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