[llvm-commits] [llvm] r102327 - /llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Apr 26 03:24:07 2010
New Revision: 102327

URL: http://llvm.org/viewvc/llvm-project?rev=102327&view=rev
Log:
Temporary disable spiller modifying dbg_value. It's breaking build.

Modified:
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=102327&r1=102326&r2=102327&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Apr 26 03:24:07 2010
@@ -1296,6 +1296,8 @@
     MachineOperand &O = ri.getOperand();
     ++ri;
     if (MI->isDebugValue()) {
+#if 0
+      // Disabled temporarily.
       // Modify DBG_VALUE now that the value is in a spill slot.
       uint64_t Offset = MI->getOperand(1).getImm();
       const MDNode *MDPtr = MI->getOperand(2).getMetadata();
@@ -1308,11 +1310,14 @@
         MachineBasicBlock *MBB = MI->getParent();
         MBB->insert(MBB->erase(MI), NewDV);
       } else {
+#endif
         DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
         RemoveMachineInstrFromMaps(MI);
         vrm.RemoveMachineInstrFromMaps(MI);
         MI->eraseFromParent();
+#if 0
       }
+#endif
       continue;
     }
     assert(!O.isImplicit() && "Spilling register that's used as implicit use?");