[llvm-commits] [llvm] r101930 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Evan Cheng
evan.cheng at apple.com
Tue Apr 20 12:22:43 PDT 2010
On Apr 20, 2010, at 11:45 AM, Jakob Stoklund Olesen wrote:
> Author: stoklund
> Date: Tue Apr 20 13:45:47 2010
> New Revision: 101930
>
> URL: http://llvm.org/viewvc/llvm-project?rev=101930&view=rev
> Log:
> When MachineLICM is hoisting a physical register after regalloc, make sure the
> register is not killed in the loop.
>
> This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
> that looked available but wasn't.
>
> A testcase would be huge and fragile, sorry.
>
> Modified:
> llvm/trunk/lib/CodeGen/MachineLICM.cpp
>
> Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101930&r1=101929&r2=101930&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 20 13:45:47 2010
> @@ -411,12 +411,25 @@
> delete[] PhysRegDefs;
> }
>
> -/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the
> -/// current loop.
> +/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the current
> +/// loop, and make sure it is not killed by any instructions in the loop.
> void MachineLICM::AddToLiveIns(unsigned Reg) {
> const std::vector<MachineBasicBlock*> Blocks = CurLoop->getBlocks();
> - for (unsigned i = 0, e = Blocks.size(); i != e; ++i)
> - Blocks[i]->addLiveIn(Reg);
> + for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
> + MachineBasicBlock *BB = Blocks[i];
> + if (!BB->isLiveIn(Reg))
> + BB->addLiveIn(Reg);
> + for (MachineBasicBlock::iterator
> + MII = BB->begin(), E = BB->end(); MII != E; ++MII) {
> + MachineInstr *MI = &*MII;
> + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> + MachineOperand &MO = MI->getOperand(i);
> + if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;
> + if (MO.getReg() == Reg || TRI->isSuperRegister(Reg, MO.getReg()))
Thanks.
Shouldn't this checks for alias rather than super register? It's bad if any part of the loop invariant is modified.
Evan
> + MO.setIsKill(false);
> + }
> + }
> + }
> }
>
> /// HoistPostRA - When an instruction is found to only use loop invariant
>
>
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