[llvm-commits] [llvm] r101377 - in /llvm/trunk/lib/Target/PowerPC: PPCInstrInfo.cpp PPCRegisterInfo.cpp

[Dan Gohman]

Author: djg
Date: Thu Apr 15 12:20:57 2010
New Revision: 101377

URL: http://llvm.org/viewvc/llvm-project?rev=101377&view=rev
Log:
EnablePPC64RS and EnablePPC32RS are used in multiple files, so they
can't be static.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=101377&r1=101376&r2=101377&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Thu Apr 15 12:20:57 2010
@@ -24,10 +24,13 @@
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/MC/MCAsmInfo.h"
-using namespace llvm;
 
+namespace llvm {
 extern cl::opt<bool> EnablePPC32RS;  // FIXME (64-bit): See PPCRegisterInfo.cpp.
 extern cl::opt<bool> EnablePPC64RS;  // FIXME (64-bit): See PPCRegisterInfo.cpp.
+}
+
+using namespace llvm;
 
 PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
   : TargetInstrInfoImpl(PPCInsts, array_lengthof(PPCInsts)), TM(tm),

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=101377&r1=101376&r2=101377&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Apr 15 12:20:57 2010
@@ -43,7 +43,6 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include <cstdlib>
-using namespace llvm;
 
 // FIXME This disables some code that aligns the stack to a boundary
 // bigger than the default (16 bytes on Darwin) when there is a stack local
@@ -56,14 +55,19 @@
 #define ALIGN_STACK 0
 
 // FIXME (64-bit): Eventually enable by default.
-static cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger",
+namespace llvm {
+cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger",
                                    cl::init(false),
                                    cl::desc("Enable PPC32 register scavenger"),
                                    cl::Hidden);
-static cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger",
+cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger",
                                    cl::init(false),
                                    cl::desc("Enable PPC64 register scavenger"),
                                    cl::Hidden);
+}
+
+using namespace llvm;
+
 #define EnableRegisterScavenging \
   ((EnablePPC32RS && !Subtarget.isPPC64()) || \
    (EnablePPC64RS && Subtarget.isPPC64()))