[llvm-commits] [llvm] r101167 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Evan Cheng
evan.cheng at apple.com
Tue Apr 13 13:21:06 PDT 2010
Author: evancheng
Date: Tue Apr 13 15:21:05 2010
New Revision: 101167
URL: http://llvm.org/viewvc/llvm-project?rev=101167&view=rev
Log:
Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101167&r1=101166&r2=101167&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 13 15:21:05 2010
@@ -276,7 +276,7 @@
SmallSet<int, 32> &StoredFIs,
SmallVector<CandidateInfo, 32> &Candidates) {
bool RuledOut = false;
- bool HasRegFIUse = false;
+ bool HasNonInvariantUse = false;
unsigned Def = 0;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
@@ -287,7 +287,7 @@
MFI->isSpillSlotObjectIndex(FI) &&
InstructionStoresToFI(MI, FI))
StoredFIs.insert(FI);
- HasRegFIUse = true;
+ HasNonInvariantUse = true;
continue;
}
@@ -300,7 +300,10 @@
"Not expecting virtual register!");
if (!MO.isDef()) {
- HasRegFIUse = true;
+ if (PhysRegDefs[Reg])
+ // If it's using a non-loop-invariant register, then it's obviously not
+ // safe to hoist.
+ HasNonInvariantUse = true;
continue;
}
@@ -338,9 +341,7 @@
// operands. FIXME: Consider unfold load folding instructions.
if (Def && !RuledOut) {
int FI = INT_MIN;
- // FIXME: Also hoist instructions if all source operands are live in
- // to the loop.
- if ((!HasRegFIUse && IsLICMCandidate(*MI)) ||
+ if ((!HasNonInvariantUse && IsLICMCandidate(*MI)) ||
(TII->isLoadFromStackSlot(MI, FI) && MFI->isSpillSlotObjectIndex(FI)))
Candidates.push_back(CandidateInfo(MI, Def, FI));
}
@@ -400,8 +401,23 @@
StoredFIs.count(Candidates[i].FI))
continue;
- if (PhysRegDefs[Candidates[i].Def] == 1)
- HoistPostRA(Candidates[i].MI, Candidates[i].Def);
+ if (PhysRegDefs[Candidates[i].Def] == 1) {
+ bool Safe = true;
+ MachineInstr *MI = Candidates[i].MI;
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = MI->getOperand(i);
+ if (!MO.isReg() || MO.isDef())
+ continue;
+ if (PhysRegDefs[MO.getReg()]) {
+ // If it's using a non-loop-invariant register, then it's obviously
+ // not safe to hoist.
+ Safe = false;
+ break;
+ }
+ }
+ if (Safe)
+ HoistPostRA(MI, Candidates[i].Def);
+ }
}
delete[] PhysRegDefs;
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