[llvm-commits] [llvm] r99827 - in /llvm/trunk/lib/Target/CellSPU: SPU.h SPUISelDAGToDAG.cpp SPUISelLowering.cpp SPURegisterInfo.cpp
Benjamin Kramer
benny.kra at googlemail.com
Mon Mar 29 12:07:58 PDT 2010
Author: d0k
Date: Mon Mar 29 14:07:58 2010
New Revision: 99827
URL: http://llvm.org/viewvc/llvm-project?rev=99827&view=rev
Log:
Remove a bunch of integer width predicate functions in favor of MathExtras.
Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).
Modified:
llvm/trunk/lib/Target/CellSPU/SPU.h
llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp
Modified: llvm/trunk/lib/Target/CellSPU/SPU.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPU.h?rev=99827&r1=99826&r2=99827&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPU.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPU.h Mon Mar 29 14:07:58 2010
@@ -15,7 +15,6 @@
#ifndef LLVM_TARGET_IBMCELLSPU_H
#define LLVM_TARGET_IBMCELLSPU_H
-#include "llvm/System/DataTypes.h"
#include "llvm/Target/TargetMachine.h"
namespace llvm {
@@ -25,134 +24,7 @@
FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
- /*--== Utility functions/predicates/etc used all over the place: --==*/
- //! Predicate test for a signed 10-bit value
- /*!
- \param Value The input value to be tested
-
- This predicate tests for a signed 10-bit value, returning the 10-bit value
- as a short if true.
- */
- template<typename T>
- inline bool isS10Constant(T Value);
-
- template<>
- inline bool isS10Constant<short>(short Value) {
- int SExtValue = ((int) Value << (32 - 10)) >> (32 - 10);
- return ((Value > 0 && Value <= (1 << 9) - 1)
- || (Value < 0 && (short) SExtValue == Value));
- }
-
- template<>
- inline bool isS10Constant<int>(int Value) {
- return (Value >= -(1 << 9) && Value <= (1 << 9) - 1);
- }
-
- template<>
- inline bool isS10Constant<uint32_t>(uint32_t Value) {
- return (Value <= ((1 << 9) - 1));
- }
-
- template<>
- inline bool isS10Constant<int64_t>(int64_t Value) {
- return (Value >= -(1 << 9) && Value <= (1 << 9) - 1);
- }
-
- template<>
- inline bool isS10Constant<uint64_t>(uint64_t Value) {
- return (Value <= ((1 << 9) - 1));
- }
-
- //! Predicate test for an unsigned 10-bit value
- /*!
- \param Value The input value to be tested
- */
- inline bool isU10Constant(short Value) {
- return (Value == (Value & 0x3ff));
- }
-
- inline bool isU10Constant(int Value) {
- return (Value == (Value & 0x3ff));
- }
-
- inline bool isU10Constant(uint32_t Value) {
- return (Value == (Value & 0x3ff));
- }
-
- inline bool isU10Constant(int64_t Value) {
- return (Value == (Value & 0x3ff));
- }
-
- inline bool isU10Constant(uint64_t Value) {
- return (Value == (Value & 0x3ff));
- }
-
- //! Predicate test for a signed 14-bit value
- /*!
- \param Value The input value to be tested
- */
- template<typename T>
- inline bool isS14Constant(T Value);
-
- template<>
- inline bool isS14Constant<short>(short Value) {
- return (Value >= -(1 << 13) && Value <= (1 << 13) - 1);
- }
-
- template<>
- inline bool isS14Constant<int>(int Value) {
- return (Value >= -(1 << 13) && Value <= (1 << 13) - 1);
- }
-
- template<>
- inline bool isS14Constant<uint32_t>(uint32_t Value) {
- return (Value <= ((1 << 13) - 1));
- }
-
- template<>
- inline bool isS14Constant<int64_t>(int64_t Value) {
- return (Value >= -(1 << 13) && Value <= (1 << 13) - 1);
- }
-
- template<>
- inline bool isS14Constant<uint64_t>(uint64_t Value) {
- return (Value <= ((1 << 13) - 1));
- }
-
- //! Predicate test for a signed 16-bit value
- /*!
- \param Value The input value to be tested
- */
- template<typename T>
- inline bool isS16Constant(T Value);
-
- template<>
- inline bool isS16Constant<short>(short Value) {
- return true;
- }
-
- template<>
- inline bool isS16Constant<int>(int Value) {
- return (Value >= -(1 << 15) && Value <= (1 << 15) - 1);
- }
-
- template<>
- inline bool isS16Constant<uint32_t>(uint32_t Value) {
- return (Value <= ((1 << 15) - 1));
- }
-
- template<>
- inline bool isS16Constant<int64_t>(int64_t Value) {
- return (Value >= -(1 << 15) && Value <= (1 << 15) - 1);
- }
-
- template<>
- inline bool isS16Constant<uint64_t>(uint64_t Value) {
- return (Value <= ((1 << 15) - 1));
- }
-
extern Target TheCellSPUTarget;
-
}
// Defines symbolic names for the SPU instructions.
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=99827&r1=99826&r2=99827&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Mon Mar 29 14:07:58 2010
@@ -44,28 +44,28 @@
bool
isI64IntS10Immediate(ConstantSDNode *CN)
{
- return isS10Constant(CN->getSExtValue());
+ return isInt<10>(CN->getSExtValue());
}
//! ConstantSDNode predicate for i32 sign-extended, 10-bit immediates
bool
isI32IntS10Immediate(ConstantSDNode *CN)
{
- return isS10Constant(CN->getSExtValue());
+ return isInt<10>(CN->getSExtValue());
}
//! ConstantSDNode predicate for i32 unsigned 10-bit immediate values
bool
isI32IntU10Immediate(ConstantSDNode *CN)
{
- return isU10Constant(CN->getSExtValue());
+ return isUint<10>(CN->getSExtValue());
}
//! ConstantSDNode predicate for i16 sign-extended, 10-bit immediate values
bool
isI16IntS10Immediate(ConstantSDNode *CN)
{
- return isS10Constant(CN->getSExtValue());
+ return isInt<10>(CN->getSExtValue());
}
//! SDNode predicate for i16 sign-extended, 10-bit immediate values
@@ -80,7 +80,7 @@
bool
isI16IntU10Immediate(ConstantSDNode *CN)
{
- return isU10Constant((short) CN->getZExtValue());
+ return isUint<10>((short) CN->getZExtValue());
}
//! SDNode predicate for i16 sign-extended, 10-bit immediate values
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=99827&r1=99826&r2=99827&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Mar 29 14:07:58 2010
@@ -1492,7 +1492,7 @@
return SDValue();
Value = Value >> 32;
}
- if (isS10Constant(Value))
+ if (isInt<10>(Value))
return DAG.getTargetConstant(Value, ValueType);
}
Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=99827&r1=99826&r2=99827&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Mon Mar 29 14:07:58 2010
@@ -371,8 +371,8 @@
// immediate, convert the instruction to X-form
// if the instruction is not an AI (which takes a s10 immediate), assume
// it is a load/store that can take a s14 immediate
- if ( (MI.getOpcode() == SPU::AIr32 && !isS10Constant(Offset))
- || !isS14Constant(Offset) ) {
+ if ((MI.getOpcode() == SPU::AIr32 && !isInt<10>(Offset))
+ || !isInt<14>(Offset)) {
int newOpcode = convertDFormToXForm(MI.getOpcode());
unsigned tmpReg = findScratchRegister(II, RS, &SPU::R32CRegClass, SPAdj);
BuildMI(MBB, II, dl, TII.get(SPU::ILr32), tmpReg )
@@ -482,14 +482,14 @@
// for the ABI
BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16)
.addReg(SPU::R1);
- if (isS10Constant(FrameSize)) {
+ if (isInt<10>(FrameSize)) {
// Spill $sp to adjusted $sp
BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize)
.addReg(SPU::R1);
// Adjust $sp by required amout
BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1)
.addImm(FrameSize);
- } else if (isS16Constant(FrameSize)) {
+ } else if (isInt<16>(FrameSize)) {
// Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
// $r2 to adjust $sp:
BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
@@ -575,7 +575,7 @@
// the "empty" frame size is 16 - just the register scavenger spill slot
if (FrameSize > 16 || MFI->hasCalls()) {
FrameSize = FrameSize + SPUFrameInfo::minStackSize();
- if (isS10Constant(FrameSize + LinkSlotOffset)) {
+ if (isInt<10>(FrameSize + LinkSlotOffset)) {
// Reload $lr, adjust $sp by required amount
// Note: We do this to slightly improve dual issue -- not by much, but it
// is an opportunity for dual issue.
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