[llvm-commits] [llvm] r99659 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrNEON.td

[Johnny Chen]

Author: johnny
Date: Fri Mar 26 17:28:56 2010
New Revision: 99659

URL: http://llvm.org/viewvc/llvm-project?rev=99659&view=rev
Log:
Add NVExtFrm to represent NEON Vector Extract Instructions, that uses Inst{11-8}
to encode the byte location of the extracted result in the concatenation of the
operands, from the least significant end.

Modify VEXTd and VEXTq classes to use the format.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=99659&r1=99658&r2=99659&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Fri Mar 26 17:28:56 2010
@@ -68,6 +68,7 @@
 def N2RegVShRFrm   : Format<37>;
 def N3RegFrm       : Format<38>;
 def N3RegVShFrm    : Format<39>;
+def NVExtFrm       : Format<40>;
 
 // Misc flags.
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=99659&r1=99658&r2=99659&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Fri Mar 26 17:28:56 2010
@@ -3253,18 +3253,18 @@
 //   VEXT     : Vector Extract
 
 class VEXTd<string OpcodeStr, string Dt, ValueType Ty>
-  : N3V<0,1,0b11,{?,?,?,?},0,0, (outs DPR:$dst),
-        (ins DPR:$lhs, DPR:$rhs, i32imm:$index), IIC_VEXTD,
-        OpcodeStr, Dt, "$dst, $lhs, $rhs, $index", "",
-        [(set DPR:$dst, (Ty (NEONvext (Ty DPR:$lhs),
-                                      (Ty DPR:$rhs), imm:$index)))]>;
+  : N3Vf<0,1,0b11,{?,?,?,?},0,0, (outs DPR:$dst),
+         (ins DPR:$lhs, DPR:$rhs, i32imm:$index), NVExtFrm,
+         IIC_VEXTD, OpcodeStr, Dt, "$dst, $lhs, $rhs, $index", "",
+         [(set DPR:$dst, (Ty (NEONvext (Ty DPR:$lhs),
+                                       (Ty DPR:$rhs), imm:$index)))]>;
 
 class VEXTq<string OpcodeStr, string Dt, ValueType Ty>
-  : N3V<0,1,0b11,{?,?,?,?},1,0, (outs QPR:$dst),
-        (ins QPR:$lhs, QPR:$rhs, i32imm:$index), IIC_VEXTQ,
-        OpcodeStr, Dt, "$dst, $lhs, $rhs, $index", "",
-        [(set QPR:$dst, (Ty (NEONvext (Ty QPR:$lhs),
-                                      (Ty QPR:$rhs), imm:$index)))]>;
+  : N3Vf<0,1,0b11,{?,?,?,?},1,0, (outs QPR:$dst),
+         (ins QPR:$lhs, QPR:$rhs, i32imm:$index), NVExtFrm,
+         IIC_VEXTQ, OpcodeStr, Dt, "$dst, $lhs, $rhs, $index", "",
+         [(set QPR:$dst, (Ty (NEONvext (Ty QPR:$lhs),
+                                       (Ty QPR:$rhs), imm:$index)))]>;
 
 def VEXTd8  : VEXTd<"vext", "8",  v8i8>;
 def VEXTd16 : VEXTd<"vext", "16", v4i16>;